[mips] Use addiu in inline assembly tests since addi is not available in all ISA's

[oota-llvm.git] / test / CodeGen / Mips / o32_cc_vararg.ll

diff --git a/test/CodeGen/Mips/o32_cc_vararg.ll b/test/CodeGen/Mips/o32_cc_vararg.ll
index 4a3d9ab8375c3aa682bb939ed8824257edb03c55..10972e884ac38ec8b2e2e7b2111dcb670664e06e 100644 (file)
--- a/test/CodeGen/Mips/o32_cc_vararg.ll
+++ b/test/CodeGen/Mips/o32_cc_vararg.ll
@@ -1,6 +1,5 @@
 ; RUN: llc -march=mipsel -pre-RA-sched=source < %s | FileCheck %s
 
-
 ; All test functions do the same thing - they return the first variable
 ; argument.
 
@@ -28,7 +27,7 @@ entry:
   %tmp = load i32* %b, align 4
   ret i32 %tmp
 
-; CHECK: va1:
+; CHECK-LABEL: va1:
 ; CHECK: addiu   $sp, $sp, -16
 ; CHECK: sw      $7, 28($sp)
 ; CHECK: sw      $6, 24($sp)
@@ -54,7 +53,7 @@ entry:
   %tmp = load double* %b, align 8
   ret double %tmp
 
-; CHECK: va2:
+; CHECK-LABEL: va2:
 ; CHECK: addiu   $sp, $sp, -16
 ; CHECK: sw      $7, 28($sp)
 ; CHECK: sw      $6, 24($sp)
@@ -82,7 +81,7 @@ entry:
   %tmp = load i32* %b, align 4
   ret i32 %tmp
 
-; CHECK: va3:
+; CHECK-LABEL: va3:
 ; CHECK: addiu   $sp, $sp, -16
 ; CHECK: sw      $7, 28($sp)
 ; CHECK: sw      $6, 24($sp)
@@ -105,7 +104,7 @@ entry:
   %tmp = load double* %b, align 8
   ret double %tmp
 
-; CHECK: va4:
+; CHECK-LABEL: va4:
 ; CHECK: addiu   $sp, $sp, -24
 ; CHECK: sw      $7, 36($sp)
 ; CHECK: sw      $6, 32($sp)
@@ -133,7 +132,7 @@ entry:
   %tmp = load i32* %d, align 4
   ret i32 %tmp
 
-; CHECK: va5:
+; CHECK-LABEL: va5:
 ; CHECK: addiu   $sp, $sp, -24
 ; CHECK: sw      $7, 36($sp)
 ; CHECK: lw      $2, 36($sp)
@@ -159,7 +158,7 @@ entry:
   %tmp = load double* %d, align 8
   ret double %tmp
 
-; CHECK: va6:
+; CHECK-LABEL: va6:
 ; CHECK: addiu   $sp, $sp, -24
 ; CHECK: sw      $7, 36($sp)
 ; CHECK: addiu   $[[R0:[0-9]+]], $sp, 36
@@ -187,7 +186,7 @@ entry:
   %tmp = load i32* %c, align 4
   ret i32 %tmp
 
-; CHECK: va7:
+; CHECK-LABEL: va7:
 ; CHECK: addiu   $sp, $sp, -24
 ; CHECK: lw      $2, 40($sp)
 }
@@ -210,7 +209,7 @@ entry:
   %tmp = load double* %c, align 8
   ret double %tmp
 
-; CHECK: va8:
+; CHECK-LABEL: va8:
 ; CHECK: addiu   $sp, $sp, -32
 ; CHECK: addiu   ${{[0-9]+}}, $sp, 48
 ; CHECK: ldc1    $f0, 48($sp)
@@ -236,7 +235,7 @@ entry:
   %tmp = load i32* %d, align 4
   ret i32 %tmp
 
-; CHECK: va9:
+; CHECK-LABEL: va9:
 ; CHECK: addiu   $sp, $sp, -32
 ; CHECK: lw      $2, 52($sp)
 }
@@ -261,7 +260,7 @@ entry:
   %tmp = load double* %d, align 8
   ret double %tmp
 
-; CHECK: va10:
+; CHECK-LABEL: va10:
 ; CHECK: addiu   $sp, $sp, -32
 ; CHECK: addiu   $[[R0:[0-9]+]], $sp, 52
 ; CHECK: addiu   $[[R1:[0-9]+]], $[[R0]], 7