mips32 long long register inline asm constraint support.

[oota-llvm.git] / test / CodeGen / Mips / inlineasm-operand-code.ll

diff --git a/test/CodeGen/Mips/inlineasm-operand-code.ll b/test/CodeGen/Mips/inlineasm-operand-code.ll
index ca4f3e4c5aed19b05c33273bca811951e7548da0..d75f7f2f806e4efed33e56bb64cd864b5f2f21e3 100644 (file)
--- a/test/CodeGen/Mips/inlineasm-operand-code.ll
+++ b/test/CodeGen/Mips/inlineasm-operand-code.ll
@@ -41,5 +41,11 @@ entry:
 ;CHECK:        #NO_APP
   tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
 
+; a long long in 32 bit mode (use to assert)
+;CHECK:        #APP
+;CHECK:        addi ${{[0-9]+}},${{[0-9]+}},3
+;CHECK:        #NO_APP
+  tail call i64 asm sideeffect "addi $0,$1,$2 \0A\09", "=r,r,X"(i64 1229801703532086340, i64 3) nounwind
+
   ret i32 0
 }