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(parent: 3d4ed08) | patch
mips32 long long register inline asm constraint support.
authorJack Carter <jcarter@mips.com>
Mon, 2 Jul 2012 22:39:45 +0000 (22:39 +0000)
committerJack Carter <jcarter@mips.com>
Mon, 2 Jul 2012 22:39:45 +0000 (22:39 +0000)
commit1b055ce320fa13f6f1ac81670d11b45e01f79876
tree0879af89a59a243b917435c0ace1d40940d559d2tree | snapshot
parent3d4ed0857437c2bbea4dcabc949d180860433d1dcommit | diff
mips32 long long register inline asm constraint support.

    inlineasm-cnstrnt-bad-r-1.ll is NOT supposed to fail, so it was removed.    This resulted in the removal of a negative test (inlineasm-cnstrnt-bad-r-1.ll)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159610 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsISelLowering.cpp diff | blob | history
test/CodeGen/Mips/inlineasm-operand-code.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors