CellSPU:

[oota-llvm.git] / test / CodeGen / CellSPU / shift_ops.ll

diff --git a/test/CodeGen/CellSPU/shift_ops.ll b/test/CodeGen/CellSPU/shift_ops.ll
index 2df2f96435d321d77e856aa38167a70c89200330..3c26baa7c7ab705d5a0db162a6ca5010f369e0b1 100644 (file)
--- a/test/CodeGen/CellSPU/shift_ops.ll
+++ b/test/CodeGen/CellSPU/shift_ops.ll
@@ -275,3 +275,9 @@ define i64 @ashr_i64_3(i64 %arg1, i32 %shift) {
        %2 = ashr i64 %arg1, %1
        ret i64 %2
 }
+
+define i32 @hi32_i64(i64 %arg) {
+       %1 = lshr i64 %arg, 32
+       %2 = trunc i64 %1 to i32
+       ret i32 %2
+}