Introduce target hook for optimizing register copies

[oota-llvm.git] / test / CodeGen / ARM / 2009-06-22-CoalescerBug.ll

diff --git a/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll b/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
index 5c8d7b0f622081b2aa72e5dc7c136e4fb70e2efc..4ab54c2e8faf8e265dff4952ea19a14288773d29 100644 (file)
--- a/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
+++ b/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
@@ -1,13 +1,13 @@
-; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
+; RUN: llc < %s -mtriple=armv6-apple-darwin
 
        %struct.rtunion = type { i64 }
        %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
 
-define arm_apcscc void @simplify_unary_real(i8* nocapture %p) nounwind {
+define void @simplify_unary_real(i8* nocapture %p) nounwind {
 entry:
-       %tmp121 = load i64* null, align 4               ; <i64> [#uses=1]
-       %0 = getelementptr %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0            ; <i64*> [#uses=1]
-       %tmp122 = load i64* %0, align 4         ; <i64> [#uses=1]
+       %tmp121 = load i64, i64* null, align 4          ; <i64> [#uses=1]
+       %0 = getelementptr %struct.rtx_def, %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0           ; <i64*> [#uses=1]
+       %tmp122 = load i64, i64* %0, align 4            ; <i64> [#uses=1]
        %1 = zext i64 undef to i192             ; <i192> [#uses=2]
        %2 = zext i64 %tmp121 to i192           ; <i192> [#uses=1]
        %3 = shl i192 %2, 64            ; <i192> [#uses=2]