enhance vmcore to know that udiv's can be exact, and add a trivial

[oota-llvm.git] / lib / VMCore / Instructions.cpp

diff --git a/lib/VMCore/Instructions.cpp b/lib/VMCore/Instructions.cpp
index 6b561f34af2b5e61aea3b3ebd1deb93b5342f56a..d1290281cb1a5e9071a76fb872730c1156c86a2a 100644 (file)
--- a/lib/VMCore/Instructions.cpp
+++ b/lib/VMCore/Instructions.cpp
@@ -1822,7 +1822,7 @@ void BinaryOperator::setHasNoSignedWrap(bool b) {
 }
 
 void BinaryOperator::setIsExact(bool b) {
-  cast<SDivOperator>(this)->setIsExact(b);
+  cast<PossiblyExactOperator>(this)->setIsExact(b);
 }
 
 bool BinaryOperator::hasNoUnsignedWrap() const {
@@ -1834,7 +1834,7 @@ bool BinaryOperator::hasNoSignedWrap() const {
 }
 
 bool BinaryOperator::isExact() const {
-  return cast<SDivOperator>(this)->isExact();
+  return cast<PossiblyExactOperator>(this)->isExact();
 }
 
 //===----------------------------------------------------------------------===//