switch (Opc) {
case Hexagon::CMPEHexagon4rr:
case Hexagon::CMPEQri:
- case Hexagon::CMPEQrr:
+ case Hexagon::C2_cmpeq:
case Hexagon::CMPGT64rr:
case Hexagon::CMPGTU64rr:
case Hexagon::CMPGTUri:
- case Hexagon::CMPGTUrr:
+ case Hexagon::C2_cmpgtu:
case Hexagon::CMPGTri:
- case Hexagon::CMPGTrr:
+ case Hexagon::C2_cmpgt:
SrcReg = MI->getOperand(1).getReg();
Mask = ~0;
break;
// Set the value/second source register.
switch (Opc) {
case Hexagon::CMPEHexagon4rr:
- case Hexagon::CMPEQrr:
+ case Hexagon::C2_cmpeq:
case Hexagon::CMPGT64rr:
case Hexagon::CMPGTU64rr:
- case Hexagon::CMPGTUrr:
- case Hexagon::CMPGTrr:
+ case Hexagon::C2_cmpgtu:
+ case Hexagon::C2_cmpgt:
case Hexagon::CMPbEQrr_sbsb_V4:
case Hexagon::CMPbEQrr_ubub_V4:
case Hexagon::CMPbGTUrr_V4:
bool HexagonInstrInfo::isNewValueJumpCandidate(const MachineInstr *MI) const {
switch (MI->getOpcode()) {
default: return false;
- case Hexagon::CMPEQrr:
+ case Hexagon::C2_cmpeq:
case Hexagon::CMPEQri:
- case Hexagon::CMPGTrr:
+ case Hexagon::C2_cmpgt:
case Hexagon::CMPGTri:
- case Hexagon::CMPGTUrr:
+ case Hexagon::C2_cmpgtu:
case Hexagon::CMPGTUri:
return true;
}