#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/BasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetInstrDesc.h"
+#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Assembly/Writer.h"
+#include "llvm/ADT/SmallString.h"
+#include "llvm/Support/Debug.h"
#include "llvm/Support/LeakDetector.h"
+#include "llvm/Support/raw_ostream.h"
#include <algorithm>
using namespace llvm;
+MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb)
+ : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false),
+ AddressTaken(false) {
+ Insts.Parent = this;
+}
+
MachineBasicBlock::~MachineBasicBlock() {
LeakDetector::removeGarbageObject(this);
}
-std::ostream& llvm::operator<<(std::ostream &OS, const MachineBasicBlock &MBB) {
+/// getSymbol - Return the MCSymbol for this basic block.
+///
+MCSymbol *MachineBasicBlock::getSymbol(MCContext &Ctx) const {
+ SmallString<60> Name;
+ const MachineFunction *MF = getParent();
+ raw_svector_ostream(Name)
+ << MF->getTarget().getMCAsmInfo()->getPrivateGlobalPrefix() << "BB"
+ << MF->getFunctionNumber() << '_' << getNumber();
+ return Ctx.GetOrCreateSymbol(Name.str());
+}
+
+
+raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
MBB.print(OS);
return OS;
}
/// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
/// gets the next available unique MBB number. If it is removed from a
/// MachineFunction, it goes back to being #-1.
-void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock* N) {
- assert(N->getParent() == 0 && "machine instruction already in a basic block");
- N->setParent(Parent);
- N->Number = Parent->addToMBBNumbering(N);
+void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) {
+ MachineFunction &MF = *N->getParent();
+ N->Number = MF.addToMBBNumbering(N);
// Make sure the instructions have their operands in the reginfo lists.
- MachineRegisterInfo &RegInfo = Parent->getRegInfo();
+ MachineRegisterInfo &RegInfo = MF.getRegInfo();
for (MachineBasicBlock::iterator I = N->begin(), E = N->end(); I != E; ++I)
I->AddRegOperandsToUseLists(RegInfo);
-
+
LeakDetector::removeGarbageObject(N);
}
-void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock* N) {
- assert(N->getParent() != 0 && "machine instruction not in a basic block");
+void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) {
N->getParent()->removeFromMBBNumbering(N->Number);
N->Number = -1;
- N->setParent(0);
-
- // Make sure the instructions have their operands removed from the reginfo
- // lists.
- for (MachineBasicBlock::iterator I = N->begin(), E = N->end(); I != E; ++I)
- I->RemoveRegOperandsFromUseLists();
-
LeakDetector::addGarbageObject(N);
}
-MachineInstr* ilist_traits<MachineInstr>::createSentinel() {
- MachineInstr* dummy = new MachineInstr();
- LeakDetector::removeGarbageObject(dummy);
- return dummy;
-}
-
/// addNodeToList (MI) - When we add an instruction to a basic block
/// list, we update its parent pointer and add its operands from reg use/def
/// lists if appropriate.
-void ilist_traits<MachineInstr>::addNodeToList(MachineInstr* N) {
+void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {
assert(N->getParent() == 0 && "machine instruction already in a basic block");
- N->setParent(parent);
- LeakDetector::removeGarbageObject(N);
+ N->setParent(Parent);
- // If the block is in a function, add the instruction's register operands to
- // their corresponding use/def lists.
- if (MachineFunction *MF = parent->getParent())
- N->AddRegOperandsToUseLists(MF->getRegInfo());
+ // Add the instruction's register operands to their corresponding
+ // use/def lists.
+ MachineFunction *MF = Parent->getParent();
+ N->AddRegOperandsToUseLists(MF->getRegInfo());
+
+ LeakDetector::removeGarbageObject(N);
}
/// removeNodeFromList (MI) - When we remove an instruction from a basic block
/// list, we update its parent pointer and remove its operands from reg use/def
/// lists if appropriate.
-void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr* N) {
+void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {
assert(N->getParent() != 0 && "machine instruction not in a basic block");
- // If this block is in a function, remove from the use/def lists.
- if (parent->getParent() != 0)
- N->RemoveRegOperandsFromUseLists();
+
+ // Remove from the use/def lists.
+ N->RemoveRegOperandsFromUseLists();
N->setParent(0);
+
LeakDetector::addGarbageObject(N);
}
/// transferNodesFromList (MI) - When moving a range of instructions from one
/// MBB list to another, we need to update the parent pointers and the use/def
/// lists.
-void ilist_traits<MachineInstr>::transferNodesFromList(
- iplist<MachineInstr, ilist_traits<MachineInstr> >& fromList,
- ilist_iterator<MachineInstr> first,
- ilist_iterator<MachineInstr> last) {
+void ilist_traits<MachineInstr>::
+transferNodesFromList(ilist_traits<MachineInstr> &fromList,
+ MachineBasicBlock::iterator first,
+ MachineBasicBlock::iterator last) {
+ assert(Parent->getParent() == fromList.Parent->getParent() &&
+ "MachineInstr parent mismatch!");
+
// Splice within the same MBB -> no change.
- if (parent == fromList.parent) return;
+ if (Parent == fromList.Parent) return;
// If splicing between two blocks within the same function, just update the
// parent pointers.
- if (parent->getParent() == fromList.parent->getParent()) {
- for (; first != last; ++first)
- first->setParent(parent);
- return;
- }
-
- // Otherwise, we have to update the parent and the use/def lists. The common
- // case when this occurs is if we're splicing from a block in a MF to a block
- // that is not in an MF.
- bool HasOldMF = fromList.parent->getParent() != 0;
- MachineFunction *NewMF = parent->getParent();
-
- for (; first != last; ++first) {
- if (HasOldMF) first->RemoveRegOperandsFromUseLists();
- first->setParent(parent);
- if (NewMF) first->AddRegOperandsToUseLists(NewMF->getRegInfo());
- }
+ for (; first != last; ++first)
+ first->setParent(Parent);
+}
+
+void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) {
+ assert(!MI->getParent() && "MI is still in a block!");
+ Parent->getParent()->DeleteMachineInstr(MI);
}
MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
}
void MachineBasicBlock::dump() const {
- print(*cerr.stream());
+ print(dbgs());
}
-static inline void OutputReg(std::ostream &os, unsigned RegNo,
+static inline void OutputReg(raw_ostream &os, unsigned RegNo,
const TargetRegisterInfo *TRI = 0) {
- if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) {
+ if (RegNo != 0 && TargetRegisterInfo::isPhysicalRegister(RegNo)) {
if (TRI)
os << " %" << TRI->get(RegNo).Name;
else
- os << " %mreg(" << RegNo << ")";
+ os << " %physreg" << RegNo;
} else
os << " %reg" << RegNo;
}
-void MachineBasicBlock::print(std::ostream &OS) const {
+StringRef MachineBasicBlock::getName() const {
+ if (const BasicBlock *LBB = getBasicBlock())
+ return LBB->getName();
+ else
+ return "(null)";
+}
+
+void MachineBasicBlock::print(raw_ostream &OS) const {
const MachineFunction *MF = getParent();
- if(!MF) {
+ if (!MF) {
OS << "Can't print out MachineBasicBlock because parent MachineFunction"
<< " is null\n";
return;
}
- const BasicBlock *LBB = getBasicBlock();
- OS << "\n";
- if (LBB) OS << LBB->getName() << ": ";
- OS << (const void*)this
- << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber();
- if (Alignment) OS << ", Alignment " << Alignment;
- if (isLandingPad()) OS << ", EH LANDING PAD";
- OS << ":\n";
+ if (Alignment) { OS << "Alignment " << Alignment << "\n"; }
+
+ OS << "BB#" << getNumber() << ": ";
+
+ const char *Comma = "";
+ if (const BasicBlock *LBB = getBasicBlock()) {
+ OS << Comma << "derived from LLVM BB ";
+ WriteAsOperand(OS, LBB, /*PrintType=*/false);
+ Comma = ", ";
+ }
+ if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
+ if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
+ OS << '\n';
const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
if (!livein_empty()) {
- OS << "Live Ins:";
+ OS << " Live Ins:";
for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
OutputReg(OS, *I, TRI);
- OS << "\n";
+ OS << '\n';
}
// Print the preds of this block according to the CFG.
if (!pred_empty()) {
OS << " Predecessors according to CFG:";
for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
- OS << " " << *PI << " (#" << (*PI)->getNumber() << ")";
- OS << "\n";
+ OS << " BB#" << (*PI)->getNumber();
+ OS << '\n';
}
for (const_iterator I = begin(); I != end(); ++I) {
- OS << "\t";
+ OS << '\t';
I->print(OS, &getParent()->getTarget());
}
if (!succ_empty()) {
OS << " Successors according to CFG:";
for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI)
- OS << " " << *SI << " (#" << (*SI)->getNumber() << ")";
- OS << "\n";
+ OS << " BB#" << (*SI)->getNumber();
+ OS << '\n';
}
}
}
void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
- MachineFunction::BasicBlockListType &BBList =getParent()->getBasicBlockList();
- getParent()->getBasicBlockList().splice(NewAfter, BBList, this);
+ getParent()->splice(NewAfter, this);
}
void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {
- MachineFunction::BasicBlockListType &BBList =getParent()->getBasicBlockList();
MachineFunction::iterator BBI = NewBefore;
- getParent()->getBasicBlockList().splice(++BBI, BBList, this);
+ getParent()->splice(++BBI, this);
}
+void MachineBasicBlock::updateTerminator() {
+ const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
+ // A block with no successors has no concerns with fall-through edges.
+ if (this->succ_empty()) return;
+
+ MachineBasicBlock *TBB = 0, *FBB = 0;
+ SmallVector<MachineOperand, 4> Cond;
+ bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
+ (void) B;
+ assert(!B && "UpdateTerminators requires analyzable predecessors!");
+ if (Cond.empty()) {
+ if (TBB) {
+ // The block has an unconditional branch. If its successor is now
+ // its layout successor, delete the branch.
+ if (isLayoutSuccessor(TBB))
+ TII->RemoveBranch(*this);
+ } else {
+ // The block has an unconditional fallthrough. If its successor is not
+ // its layout successor, insert a branch.
+ TBB = *succ_begin();
+ if (!isLayoutSuccessor(TBB))
+ TII->InsertBranch(*this, TBB, 0, Cond);
+ }
+ } else {
+ if (FBB) {
+ // The block has a non-fallthrough conditional branch. If one of its
+ // successors is its layout successor, rewrite it to a fallthrough
+ // conditional branch.
+ if (isLayoutSuccessor(TBB)) {
+ if (TII->ReverseBranchCondition(Cond))
+ return;
+ TII->RemoveBranch(*this);
+ TII->InsertBranch(*this, FBB, 0, Cond);
+ } else if (isLayoutSuccessor(FBB)) {
+ TII->RemoveBranch(*this);
+ TII->InsertBranch(*this, TBB, 0, Cond);
+ }
+ } else {
+ // The block has a fallthrough conditional branch.
+ MachineBasicBlock *MBBA = *succ_begin();
+ MachineBasicBlock *MBBB = *llvm::next(succ_begin());
+ if (MBBA == TBB) std::swap(MBBB, MBBA);
+ if (isLayoutSuccessor(TBB)) {
+ if (TII->ReverseBranchCondition(Cond)) {
+ // We can't reverse the condition, add an unconditional branch.
+ Cond.clear();
+ TII->InsertBranch(*this, MBBA, 0, Cond);
+ return;
+ }
+ TII->RemoveBranch(*this);
+ TII->InsertBranch(*this, MBBA, 0, Cond);
+ } else if (!isLayoutSuccessor(MBBA)) {
+ TII->RemoveBranch(*this);
+ TII->InsertBranch(*this, TBB, MBBA, Cond);
+ }
+ }
+ }
+}
void MachineBasicBlock::addSuccessor(MachineBasicBlock *succ) {
Successors.push_back(succ);
MachineBasicBlock::removeSuccessor(succ_iterator I) {
assert(I != Successors.end() && "Not a current successor!");
(*I)->removePredecessor(this);
- return(Successors.erase(I));
+ return Successors.erase(I);
}
void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) {
Predecessors.erase(I);
}
-bool MachineBasicBlock::isSuccessor(MachineBasicBlock *MBB) const {
+void MachineBasicBlock::transferSuccessors(MachineBasicBlock *fromMBB) {
+ if (this == fromMBB)
+ return;
+
+ for (MachineBasicBlock::succ_iterator I = fromMBB->succ_begin(),
+ E = fromMBB->succ_end(); I != E; ++I)
+ addSuccessor(*I);
+
+ while (!fromMBB->succ_empty())
+ fromMBB->removeSuccessor(fromMBB->succ_begin());
+}
+
+bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const {
std::vector<MachineBasicBlock *>::const_iterator I =
std::find(Successors.begin(), Successors.end(), MBB);
return I != Successors.end();
}
+bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const {
+ MachineFunction::const_iterator I(this);
+ return llvm::next(I) == MachineFunction::const_iterator(MBB);
+}
+
+bool MachineBasicBlock::canFallThrough() {
+ MachineFunction::iterator Fallthrough = this;
+ ++Fallthrough;
+ // If FallthroughBlock is off the end of the function, it can't fall through.
+ if (Fallthrough == getParent()->end())
+ return false;
+
+ // If FallthroughBlock isn't a successor, no fallthrough is possible.
+ if (!isSuccessor(Fallthrough))
+ return false;
+
+ // Analyze the branches, if any, at the end of the block.
+ MachineBasicBlock *TBB = 0, *FBB = 0;
+ SmallVector<MachineOperand, 4> Cond;
+ const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
+ if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
+ // If we couldn't analyze the branch, examine the last instruction.
+ // If the block doesn't end in a known control barrier, assume fallthrough
+ // is possible. The isPredicable check is needed because this code can be
+ // called during IfConversion, where an instruction which is normally a
+ // Barrier is predicated and thus no longer an actual control barrier. This
+ // is over-conservative though, because if an instruction isn't actually
+ // predicated we could still treat it like a barrier.
+ return empty() || !back().getDesc().isBarrier() ||
+ back().getDesc().isPredicable();
+ }
+
+ // If there is no branch, control always falls through.
+ if (TBB == 0) return true;
+
+ // If there is some explicit branch to the fallthrough block, it can obviously
+ // reach, even though the branch should get folded to fall through implicitly.
+ if (MachineFunction::iterator(TBB) == Fallthrough ||
+ MachineFunction::iterator(FBB) == Fallthrough)
+ return true;
+
+ // If it's an unconditional branch to some block not the fall through, it
+ // doesn't fall through.
+ if (Cond.empty()) return false;
+
+ // Otherwise, if it is conditional and has no explicit false block, it falls
+ // through.
+ return FBB == 0;
+}
+
+/// removeFromParent - This method unlinks 'this' from the containing function,
+/// and returns it, but does not delete it.
+MachineBasicBlock *MachineBasicBlock::removeFromParent() {
+ assert(getParent() && "Not embedded in a function!");
+ getParent()->remove(this);
+ return this;
+}
+
+
+/// eraseFromParent - This method unlinks 'this' from the containing function,
+/// and deletes it.
+void MachineBasicBlock::eraseFromParent() {
+ assert(getParent() && "Not embedded in a function!");
+ getParent()->erase(this);
+}
+
+
/// ReplaceUsesOfBlockWith - Given a machine basic block that branched to
/// 'Old', change the code and CFG so that it branches to 'New' instead.
void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
// Scan the operands of this machine instruction, replacing any uses of Old
// with New.
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
- if (I->getOperand(i).isMBB() && I->getOperand(i).getMBB() == Old)
+ if (I->getOperand(i).isMBB() &&
+ I->getOperand(i).getMBB() == Old)
I->getOperand(i).setMBB(New);
}
- // Update the successor information. If New was already a successor, just
- // remove the link to Old instead of creating another one. PR 1444.
+ // Update the successor information.
removeSuccessor(Old);
- if (!isSuccessor(New))
- addSuccessor(New);
+ addSuccessor(New);
}
/// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the
/// CFG to be inserted. If we have proven that MBB can only branch to DestA and
-/// DestB, remove any other MBB successors from the CFG. DestA and DestB can
-/// be null.
+/// DestB, remove any other MBB successors from the CFG. DestA and DestB can be
+/// null.
+///
/// Besides DestA and DestB, retain other edges leading to LandingPads
/// (currently there can be only one; we don't check or require that here).
/// Note it is possible that DestA and/or DestB are LandingPads.
bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA,
MachineBasicBlock *DestB,
bool isCond) {
+ // The values of DestA and DestB frequently come from a call to the
+ // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial
+ // values from there.
+ //
+ // 1. If both DestA and DestB are null, then the block ends with no branches
+ // (it falls through to its successor).
+ // 2. If DestA is set, DestB is null, and isCond is false, then the block ends
+ // with only an unconditional branch.
+ // 3. If DestA is set, DestB is null, and isCond is true, then the block ends
+ // with a conditional branch that falls through to a successor (DestB).
+ // 4. If DestA and DestB is set and isCond is true, then the block ends with a
+ // conditional branch followed by an unconditional branch. DestA is the
+ // 'true' destination and DestB is the 'false' destination.
+
bool MadeChange = false;
bool AddedFallThrough = false;
- MachineBasicBlock *FallThru = getNext();
+ MachineFunction::iterator FallThru =
+ llvm::next(MachineFunction::iterator(this));
- // If this block ends with a conditional branch that falls through to its
- // successor, set DestB as the successor.
if (isCond) {
+ // If this block ends with a conditional branch that falls through to its
+ // successor, set DestB as the successor.
if (DestB == 0 && FallThru != getParent()->end()) {
DestB = FallThru;
AddedFallThrough = true;
}
} else {
// If this is an unconditional branch with no explicit dest, it must just be
- // a fallthrough into DestB.
+ // a fallthrough into DestA.
if (DestA == 0 && FallThru != getParent()->end()) {
DestA = FallThru;
AddedFallThrough = true;
MachineBasicBlock::succ_iterator SI = succ_begin();
MachineBasicBlock *OrigDestA = DestA, *OrigDestB = DestB;
while (SI != succ_end()) {
- if (*SI == DestA && DestA == DestB) {
- DestA = DestB = 0;
- ++SI;
- } else if (*SI == DestA) {
+ const MachineBasicBlock *MBB = *SI;
+ if (MBB == DestA) {
DestA = 0;
++SI;
- } else if (*SI == DestB) {
+ } else if (MBB == DestB) {
DestB = 0;
++SI;
- } else if ((*SI)->isLandingPad() &&
- *SI!=OrigDestA && *SI!=OrigDestB) {
+ } else if (MBB->isLandingPad() &&
+ MBB != OrigDestA && MBB != OrigDestB) {
++SI;
} else {
// Otherwise, this is a superfluous edge, remove it.
MadeChange = true;
}
}
- if (!AddedFallThrough) {
- assert(DestA == 0 && DestB == 0 &&
- "MachineCFG is missing edges!");
- } else if (isCond) {
+
+ if (!AddedFallThrough)
+ assert(DestA == 0 && DestB == 0 && "MachineCFG is missing edges!");
+ else if (isCond)
assert(DestA == 0 && "MachineCFG is missing edges!");
- }
+
return MadeChange;
}
+
+/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping
+/// any DBG_VALUE instructions. Return UnknownLoc if there is none.
+DebugLoc
+MachineBasicBlock::findDebugLoc(MachineBasicBlock::iterator &MBBI) {
+ DebugLoc DL;
+ MachineBasicBlock::iterator E = end();
+ if (MBBI != E) {
+ // Skip debug declarations, we don't want a DebugLoc from them.
+ MachineBasicBlock::iterator MBBI2 = MBBI;
+ while (MBBI2 != E && MBBI2->isDebugValue())
+ MBBI2++;
+ if (MBBI2 != E)
+ DL = MBBI2->getDebugLoc();
+ }
+ return DL;
+}
+
+void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB,
+ bool t) {
+ OS << "BB#" << MBB->getNumber();
+}
+
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