1 ; Positive test for inline register constraints
3 ; RUN: llc -march=mipsel < %s | FileCheck %s
5 define i32 @main() nounwind {
10 ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},0xfffffffffffffffd
12 tail call i32 asm sideeffect "addi $0,$1,${2:X}", "=r,r,I"(i32 7, i32 -3) nounwind
16 ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},0xfffd
18 tail call i32 asm sideeffect "addi $0,$1,${2:x}", "=r,r,I"(i32 7, i32 -3) nounwind
22 ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},-3
24 tail call i32 asm sideeffect "addi $0,$1,${2:d}", "=r,r,I"(i32 7, i32 -3) nounwind
28 ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},-4
30 tail call i32 asm sideeffect "addi $0,$1,${2:m}", "=r,r,I"(i32 7, i32 -3) nounwind
34 ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},-3
36 tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 -3) nounwind
40 ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},$0
42 tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
44 ; a long long in 32 bit mode (use to assert)
46 ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},3
48 tail call i64 asm sideeffect "addi $0,$1,$2 \0A\09", "=r,r,X"(i64 1229801703532086340, i64 3) nounwind