mips32 long long register inline asm constraint support.
authorJack Carter <jcarter@mips.com>
Mon, 2 Jul 2012 23:35:23 +0000 (23:35 +0000)
committerJack Carter <jcarter@mips.com>
Mon, 2 Jul 2012 23:35:23 +0000 (23:35 +0000)
commit10de025a67aa37112d5d4cd703925a7c1996422a
tree01b6b0506dc61ab43904a7b71b5a499ba8376c1e
parent80c1b38eff2fb3200cdddb1ef6641d64de8496a8
mips32 long long register inline asm constraint support.

    inlineasm-cnstrnt-bad-r-1.ll is NOT supposed to fail, so it was removed.    This resulted in the removal of a negative test (inlineasm-cnstrnt-bad-r-1.ll)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159625 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsISelLowering.cpp
test/CodeGen/Mips/inlineasm-operand-code.ll