1 ; RUN: llc -march=mips -mcpu=mips32 -verify-machineinstrs < %s | FileCheck %s -check-prefix=ALL -check-prefix=ACC -check-prefix=TRAP
2 ; RUN: llc -march=mips -mcpu=mips32 -mno-check-zero-division < %s | FileCheck %s -check-prefix=ALL -check-prefix=ACC -check-prefix=NOCHECK
6 ; ACC - Accumulator based multiply/divide. I.e. All ISA's before MIPS32r6
7 ; TRAP - Division must be explicitly checked for divide by zero
8 ; NOCHECK - Division by zero will not be detected
10 @g0 = common global i32 0, align 4
11 @g1 = common global i32 0, align 4
13 define i32 @sdiv1(i32 %a0, i32 %a1) nounwind readnone {
17 ; ACC: div $zero, $4, $5
19 ; TRAP: teq $5, $zero, 7
26 %div = sdiv i32 %a0, %a1
30 define i32 @srem1(i32 %a0, i32 %a1) nounwind readnone {
34 ; ACC: div $zero, $4, $5
36 ; TRAP: teq $5, $zero, 7
43 %rem = srem i32 %a0, %a1
47 define i32 @udiv1(i32 %a0, i32 %a1) nounwind readnone {
51 ; ACC: divu $zero, $4, $5
53 ; TRAP: teq $5, $zero, 7
59 %div = udiv i32 %a0, %a1
63 define i32 @urem1(i32 %a0, i32 %a1) nounwind readnone {
67 ; ACC: divu $zero, $4, $5
69 ; TRAP: teq $5, $zero, 7
76 %rem = urem i32 %a0, %a1
80 define i32 @sdivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind {
82 ; ALL-LABEL: sdivrem1:
84 ; ACC: div $zero, $4, $5
85 ; TRAP: teq $5, $zero, 7
88 ; ACC: mfhi $[[R0:[0-9]+]]
89 ; ACC: sw $[[R0]], 0(${{[0-9]+}})
93 %rem = srem i32 %a0, %a1
94 store i32 %rem, i32* %r, align 4
95 %div = sdiv i32 %a0, %a1
99 define i32 @udivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind {
101 ; ALL-LABEL: udivrem1:
103 ; ACC: divu $zero, $4, $5
104 ; TRAP: teq $5, $zero, 7
107 ; ACC: mfhi $[[R0:[0-9]+]]
108 ; ACC: sw $[[R0]], 0(${{[0-9]+}})
112 %rem = urem i32 %a0, %a1
113 store i32 %rem, i32* %r, align 4
114 %div = udiv i32 %a0, %a1
118 ; FIXME: It's not clear what this is supposed to test.
119 define i32 @killFlags() {
121 %0 = load i32* @g0, align 4
122 %1 = load i32* @g1, align 4
123 %div = sdiv i32 %0, %1