1 //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcV8TargetMachine.h"
15 #include "llvm/Module.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/Target/TargetMachineImpls.h"
20 #include "llvm/Target/TargetMachineRegistry.h"
21 #include "llvm/Transforms/Scalar.h"
26 // Register the target.
27 RegisterTarget<SparcV8TargetMachine> X("sparcv8", "SPARC V8 (experimental)");
30 // allocateSparcV8TargetMachine - Allocate and return a subclass of
31 // TargetMachine that implements the SparcV8 backend.
33 TargetMachine *llvm::allocateSparcV8TargetMachine(const Module &M,
34 IntrinsicLowering *IL) {
35 return new SparcV8TargetMachine(M, IL);
38 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
40 SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
41 IntrinsicLowering *IL)
42 : TargetMachine("SparcV8", IL, true, 4, 4, 4, 4, 4),
43 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
46 /// addPassesToEmitAssembly - Add passes to the specified pass manager
47 /// to implement a static compiler for this target.
49 bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
51 // FIXME: Implement efficient support for garbage collection intrinsics.
52 PM.add(createLowerGCPass());
54 // Replace malloc and free instructions with library calls.
55 PM.add(createLowerAllocationsPass());
57 // FIXME: implement the select instruction in the instruction selector.
58 PM.add(createLowerSelectPass());
60 // FIXME: implement the switch instruction in the instruction selector.
61 PM.add(createLowerSwitchPass());
63 // FIXME: implement the invoke/unwind instructions!
64 PM.add(createLowerInvokePass());
66 PM.add(createLowerConstantExpressionsPass());
68 // Make sure that no unreachable blocks are instruction selected.
69 PM.add(createUnreachableBlockEliminationPass());
71 PM.add(createSparcV8SimpleInstructionSelector(*this));
73 // Print machine instructions as they were initially generated.
75 PM.add(createMachineFunctionPrinterPass(&std::cerr));
77 PM.add(createRegisterAllocator());
78 PM.add(createPrologEpilogCodeInserter());
80 // Print machine instructions after register allocation and prolog/epilog
83 PM.add(createMachineFunctionPrinterPass(&std::cerr));
85 PM.add(createSparcV8DelaySlotFillerPass(*this));
87 // Print machine instructions after filling delay slots.
89 PM.add(createMachineFunctionPrinterPass(&std::cerr));
91 // Output assembly language.
92 PM.add(createSparcV8CodePrinterPass(Out, *this));
94 // Delete the MachineInstrs we generated, since they're no longer needed.
95 PM.add(createMachineCodeDeleter());
99 /// addPassesToJITCompile - Add passes to the specified pass manager to
100 /// implement a fast dynamic compiler for this target.
102 void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
103 // FIXME: Implement efficient support for garbage collection intrinsics.
104 PM.add(createLowerGCPass());
106 // Replace malloc and free instructions with library calls.
107 PM.add(createLowerAllocationsPass());
109 // FIXME: implement the select instruction in the instruction selector.
110 PM.add(createLowerSelectPass());
112 // FIXME: implement the switch instruction in the instruction selector.
113 PM.add(createLowerSwitchPass());
115 // FIXME: implement the invoke/unwind instructions!
116 PM.add(createLowerInvokePass());
118 PM.add(createLowerConstantExpressionsPass());
120 // Make sure that no unreachable blocks are instruction selected.
121 PM.add(createUnreachableBlockEliminationPass());
123 PM.add(createSparcV8SimpleInstructionSelector(TM));
125 // Print machine instructions as they were initially generated.
126 if (PrintMachineCode)
127 PM.add(createMachineFunctionPrinterPass(&std::cerr));
129 PM.add(createRegisterAllocator());
130 PM.add(createPrologEpilogCodeInserter());
132 // Print machine instructions after register allocation and prolog/epilog
134 if (PrintMachineCode)
135 PM.add(createMachineFunctionPrinterPass(&std::cerr));
137 PM.add(createSparcV8DelaySlotFillerPass(TM));
139 // Print machine instructions after filling delay slots.
140 if (PrintMachineCode)
141 PM.add(createMachineFunctionPrinterPass(&std::cerr));