Add insertAfter. This should have accompanied previous check-in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114481 91177308-0d34-0410-b5e6-96231b3b80d8

If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
Testcase is in r114476.
This fixes radar 8412415.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8

Use FileCheck

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114475 91177308-0d34-0410-b5e6-96231b3b80d8

correct this logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8

Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
the predicate to discover the number of sign bits.  Enhance X86's target lowering to provide
a useful response to this query.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8

just like they can opt into getting the root of the pattern being
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8

fix a long standing wart: all the ComplexPattern's were being
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling).   Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114471 91177308-0d34-0410-b5e6-96231b3b80d8

Refix MSVC9 and upper_bound. It actually needs a fully symmetric comparator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114469 91177308-0d34-0410-b5e6-96231b3b80d8

even though I'm about to rip it out, simplify the address mode stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114468 91177308-0d34-0410-b5e6-96231b3b80d8

finish pushing MachinePointerInfo through selectiondags.  At this point,
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8

convert a couple more places to use the new getStore()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114463 91177308-0d34-0410-b5e6-96231b3b80d8

update a bunch of code to use the MachinePointerInfo version of getStore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8

When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8

Don't pollute the global namespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114459 91177308-0d34-0410-b5e6-96231b3b80d8

MSVC9 does not support upper_bound with an asymmetric comparator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114455 91177308-0d34-0410-b5e6-96231b3b80d8

Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load
and store intrinsics are represented with MemIntrinsicSDNodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114454 91177308-0d34-0410-b5e6-96231b3b80d8

eliminate some uses of the getStore overload.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114453 91177308-0d34-0410-b5e6-96231b3b80d8

eliminate an old SelectionDAG::getTruncStore method, propagating
MachinePointerInfo around more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8

eliminate last SelectionDAG::getLoad old entrypoint, on to stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114450 91177308-0d34-0410-b5e6-96231b3b80d8

fix the code that infers SV info to be correct when dealing
with an indexed load/store that has an offset in the index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114449 91177308-0d34-0410-b5e6-96231b3b80d8

Add LiveInterval::find and use it for most LiveRange searching operations
instead of calling lower_bound or upper_bound directly.

This cleans up the search logic a bit because {lower,upper}_bound compare
LR->start by default, and it is usually simpler to search LR->end.

Funnelling all searches through one function also makes it possible to replace
the search algorithm with something faster than binary search.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114448 91177308-0d34-0410-b5e6-96231b3b80d8

Remove dead method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114447 91177308-0d34-0410-b5e6-96231b3b80d8

propagate MachinePointerInfo through various uses of the old
SelectionDAG::getExtLoad overload, and eliminate it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8

Fix errant printing of [v]ldm instructions that aren't a pop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114445 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114444 91177308-0d34-0410-b5e6-96231b3b80d8

continue MachinePointerInfo'izing, eliminating use of one of the old
getLoad overloads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8

convert dagcombine off the old form of getLoad.  This fixes several bugs
with SVOffset computation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8

Make CreateComplexVariable independent of SmallVector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114439 91177308-0d34-0410-b5e6-96231b3b80d8

simplify DAGCombiner::SimplifySelectOps step #2/2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8

substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.
no functionality change (step #1)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8

Trailing whitespace, 80-col violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114435 91177308-0d34-0410-b5e6-96231b3b80d8

llvmc: split llvm_gcc_based into llvm_gcc_{pch,comp}_based.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114434 91177308-0d34-0410-b5e6-96231b3b80d8

llvmc: Allow multiple output languages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114433 91177308-0d34-0410-b5e6-96231b3b80d8

Trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114432 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed ambiguous call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114431 91177308-0d34-0410-b5e6-96231b3b80d8

Fix buglet when the TST instruction directly uses the AND result.
I am unable to write a test for this case, help is solicited, though...
What I did is to tickle the code in the debugger and verify that we do the right thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114430 91177308-0d34-0410-b5e6-96231b3b80d8

Added an additional PBQP problem builder which adds coalescing costs (both between pairs of virtuals, and between virtuals and physicals).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114429 91177308-0d34-0410-b5e6-96231b3b80d8

Move the search for the appropriate AND instruction
into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.

No functionality changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114428 91177308-0d34-0410-b5e6-96231b3b80d8

llvmc: put linker options in a separate OptList.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114427 91177308-0d34-0410-b5e6-96231b3b80d8

a few more trivial updates.  This fixes PerformInsertVectorEltInMemory to not
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114411 91177308-0d34-0410-b5e6-96231b3b80d8

convert the targets off the non-MachinePointerInfo of getLoad.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114410 91177308-0d34-0410-b5e6-96231b3b80d8

add some accessors

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114409 91177308-0d34-0410-b5e6-96231b3b80d8

it's more elegant to put the "getConstantPool" and
"getFixedStack" on the MachinePointerInfo class.  While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114406 91177308-0d34-0410-b5e6-96231b3b80d8

ugh, missed a file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114405 91177308-0d34-0410-b5e6-96231b3b80d8

update the X86 backend to use the MachinePointerInfo version of one
of the getLoad methods.  This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114404 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug where the x86 backend would lower memcpy/memset of segment relative operations
into non-segment-relative copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114402 91177308-0d34-0410-b5e6-96231b3b80d8

reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
instead of srcvalue/offset pairs.  This corrects SV info for mem
operations whose size is > 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8

add some helpful accessors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114400 91177308-0d34-0410-b5e6-96231b3b80d8

add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a
MachinePointerInfo.  Among other virtues, this doesn't silently  truncate the
svoffset to 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114399 91177308-0d34-0410-b5e6-96231b3b80d8

simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114397 91177308-0d34-0410-b5e6-96231b3b80d8

chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,
eliminating some weird "infer a frame address" logic which was dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114396 91177308-0d34-0410-b5e6-96231b3b80d8

don't implicitly drop the offset of a machinememoperand when legalizing atomics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114395 91177308-0d34-0410-b5e6-96231b3b80d8

force clients of MachineFunction::getMachineMemOperand to provide a
MachinePointerInfo, propagating the type out a level of API.  Remove
the old MachineFunction::getMachineMemOperand impl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114393 91177308-0d34-0410-b5e6-96231b3b80d8

convert targets to the new MF.getMachineMemOperand interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114391 91177308-0d34-0410-b5e6-96231b3b80d8

start pushing MachinePointerInfo out through the MachineMemOperand interface
to the MachineFunction construction methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114390 91177308-0d34-0410-b5e6-96231b3b80d8

refactor the Value*/offset pair from MachineMemOperand out to a new
MachinePointerInfo struct, no functionality change.

This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114389 91177308-0d34-0410-b5e6-96231b3b80d8

random cruft in my tree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114387 91177308-0d34-0410-b5e6-96231b3b80d8

fix rdar://8453210, a crash handling a call through a GS relative load.
For now, just disable folding the load into the call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114386 91177308-0d34-0410-b5e6-96231b3b80d8

Revert unrelated change that was accidentally included in the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114383 91177308-0d34-0410-b5e6-96231b3b80d8

Implement support for .local and its "interesting" interactions with .comm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114382 91177308-0d34-0410-b5e6-96231b3b80d8

Enable machine sinking critical edge splitting. e.g.

define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8

Relax this check to silently swallow FE_INEXACT, following directions
from rdar://8452472. This unbreaks gcc.dg/builtins-17.c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114368 91177308-0d34-0410-b5e6-96231b3b80d8

CombinerAA is now reordering these stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114354 91177308-0d34-0410-b5e6-96231b3b80d8

When TCO is turned on, it is possible to end up with aliasing FrameIndex's.  Therefore,
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify ARM callee-saved register handling by removing the distinction
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114340 91177308-0d34-0410-b5e6-96231b3b80d8

Produce a R_X86_64_32 when the value is >=0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114339 91177308-0d34-0410-b5e6-96231b3b80d8

Avoid splitting critical edge twice for a set of PHI uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114338 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the "unable to rename temporary" lit test failing on Windows. rename is now copy + delete on Windows. Problem to be revisited for a permanent and clean solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114320 91177308-0d34-0410-b5e6-96231b3b80d8

fix a bug I introduced back in the hayday of version #2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114319 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen.

r114297 raises 3 failures. They might fail also on mingw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114317 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r114312 while I sort out some issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8

Tentatively enabled DAGCombiner Alias Analysis by default.  As far as I know,
r114268 fixed the last of the blockers to enabling it.  I will be monitoring
for failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8

Add one more Core i7 model number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114310 91177308-0d34-0410-b5e6-96231b3b80d8

Using regexp-opt for keyword regex declarations makes the word lists more
readable and easier to edit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114308 91177308-0d34-0410-b5e6-96231b3b80d8

idiom recognition should catch this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114304 91177308-0d34-0410-b5e6-96231b3b80d8

add a readme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114303 91177308-0d34-0410-b5e6-96231b3b80d8

add corei7, the laptop version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114302 91177308-0d34-0410-b5e6-96231b3b80d8

X86Subtarget.h: Fix Cygwin's TD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114297 91177308-0d34-0410-b5e6-96231b3b80d8

Add the exit instruction to the PTX target.

Patch by Che-Liang Chiou <clchiou@gmail.com>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114294 91177308-0d34-0410-b5e6-96231b3b80d8

Handle the odd case where we only have one instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114293 91177308-0d34-0410-b5e6-96231b3b80d8

Fix build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114292 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure the STT_FILE symbol is the first one in the symbol table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114285 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak msvc build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114284 91177308-0d34-0410-b5e6-96231b3b80d8

restrict dyn_cast_or_null to pointer types, just like cast_or_null; re-commit of r114279, backed out in r114280

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114282 91177308-0d34-0410-b5e6-96231b3b80d8

back out r114279 as some darwin buildbots get errors compiling clang:
svn merge -c -114279 llvm/include/llvm/Support/Casting.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114280 91177308-0d34-0410-b5e6-96231b3b80d8

restrict dyn_cast_or_null to pointer types, just like cast_or_null

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114279 91177308-0d34-0410-b5e6-96231b3b80d8

do not rely on the implicit-dereference semantics of dyn_cast_or_null

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114278 91177308-0d34-0410-b5e6-96231b3b80d8

do not rely on the implicit-dereference semantics of dyn_cast_or_null

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114277 91177308-0d34-0410-b5e6-96231b3b80d8

remove CallSite::get; it is still present (as protected) in the baseclass, use one of the constructors intead

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114275 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed non-const iterator error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114273 91177308-0d34-0410-b5e6-96231b3b80d8

Added a separate class (PBQPBuilder) for PBQP Problem construction. This class can be extended to support custom constraints.

For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming
no issues with the builder system come up.

To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a
Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114272 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Tweak wording.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114271 91177308-0d34-0410-b5e6-96231b3b80d8

Fix code that break critical edges for PHI uses. Watch out for multiple PHIs in different blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114270 91177308-0d34-0410-b5e6-96231b3b80d8

Invert the logic of reachesChainWithoutSideEffects().  What we want to check is that there is
NO path to the destination containing side effects, not that SOME path contains no side effects.
In  practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb opcodes for thumb calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114263 91177308-0d34-0410-b5e6-96231b3b80d8

lit: Bump version to 0.2.0dev, for no apparent reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114262 91177308-0d34-0410-b5e6-96231b3b80d8

lit: Tweak setup.py.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114261 91177308-0d34-0410-b5e6-96231b3b80d8

lit: These TODOs are done(ish).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114260 91177308-0d34-0410-b5e6-96231b3b80d8

Add addrmode5 fp load support.  Swap float/thumb operand adding to handle
thumb with floating point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114256 91177308-0d34-0410-b5e6-96231b3b80d8

Floating point stores have a 3rd addressing mode type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114254 91177308-0d34-0410-b5e6-96231b3b80d8