| 2011-10-18 |
Jim Grosbach | ARM VTBL (one register) assembly parsing and encoding. |
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| 2011-10-18 |
Jim Grosbach | ARM assembly parsing and encoding for VMOV.i64. |
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| 2011-10-18 |
Jim Grosbach | ARM assembly parsing and encoding for VMOV/VMVN/VORR... |
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| 2011-10-17 |
Jim Grosbach | ARM assembly parsing and encoding for VMOV/VMVN/VORR... |
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| 2011-10-17 |
Jim Grosbach | ARM NEON "vmov.i8" immediate assembly parsing and encoding. |
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| 2011-10-12 |
Jim Grosbach | ARM parsing and encoding for the <option> form of LDC... |
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| 2011-10-10 |
Jakob Stoklund Olesen | Emit full ED initializers even for pseudo-instructions. |
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| 2011-10-10 |
Jakob Stoklund Olesen | Insert dummy ED table entries for pseudo-instructions. |
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| 2011-10-07 |
Jim Grosbach | ARM NEON assembly parsing and encoding for VDUP(scalar). |
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| 2011-10-06 |
Craig Topper | Fix assembling of xchg %eax, %eax to not use the NOP... |
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| 2011-10-01 |
Peter Collingbourne | Move TableGen's parser and entry point into a library |
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| 2011-09-26 |
Owen Anderson | ASR #32 is not allowed on Thumb2 USAT and SSAT instruct... |
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| 2011-09-19 |
Jim Grosbach | Thumb2 assembly parsing and encoding for TBB/TBH. |
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| 2011-09-09 |
Jim Grosbach | Thumb2 assembly parsing and encoding for LDREX/LDREXB... |
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| 2011-09-07 |
Jim Grosbach | Thumb2 assembly parsing and encoding for LDRBT. |
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| 2011-09-07 |
Jim Grosbach | Thumb2 parsing and encoding for LDR(immediate). |
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| 2011-08-26 |
Owen Anderson | Improve encoding support for BLX with immediat eoperand... |
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| 2011-08-24 |
Jim Grosbach | Thumb parsing and encoding support for ADD SP instructions. |
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| 2011-08-24 |
Jim Grosbach | Thumb1 ADD/SUB SP instructions are predicable in Thumb2... |
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| 2011-08-09 |
Owen Anderson | Create a new register class for the set of all GPRs... |
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| 2011-08-08 |
Owen Anderson | Fix encodings for Thumb ASR and LSR immediate operands... |
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| 2011-08-04 |
Owen Anderson | LDCL_POST and STCL_POST need one's-complement offsets... |
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| 2011-08-03 |
Jim Grosbach | ARM refactoring assembly parsing of memory address... |
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| 2011-08-02 |
Jim Grosbach | ARM: rename addrmode7 to addr_offset_none. |
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| 2011-07-27 |
Kevin Enderby | Fix llvm-mc handing of x86 instructions that take 8... |
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| 2011-07-26 |
Owen Anderson | Split am2offset into register addend and immediate... |
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| 2011-07-26 |
Jim Grosbach | ARM parsing and encoding for SVC instruction. |
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| 2011-07-25 |
Jim Grosbach | ARM assembly parsing and encoding for SSAT16 instruction. |
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| 2011-07-22 |
Jim Grosbach | ARM SSAT instruction 5-bit immediate handling. |
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| 2011-07-21 |
Owen Anderson | Get rid of the extraneous GPR operand on so_reg_imm... |
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| 2011-07-21 |
Owen Anderson | Split up the ARM so_reg ComplexPattern into so_reg_reg... |
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| 2011-07-20 |
Jim Grosbach | ARM PKH shift ammount operand printing tweaks. |
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| 2011-07-19 |
Jim Grosbach | ARM assembly parsing for MOV (immediate). |
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| 2011-07-13 |
Jim Grosbach | Range checking for CDP[2] immediates. |
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| 2011-07-13 |
Jim Grosbach | Give the ARM BKPT instruction the right operand type. |
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| 2011-07-11 |
Shantonu Sen | Resynchronize EDInfo.h and EDEmitter.cpp. |
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| 2011-07-06 |
Jim Grosbach | Don't require pseudo-instructions to carry encoding... |
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| 2011-06-27 |
Jim Grosbach | ARM Assembly support for Thumb mov-immediate. |
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| 2011-05-31 |
Bruno Cardoso Lopes | Fix ssat and ssat16 encodings for ARM and Thumb. The... |
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| 2011-05-09 |
Mon P Wang | Fixed MC encoding for index_align for VLD1/VST1 (single... |
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| 2011-04-23 |
Jay Foad | Remove unused STL header includes. |
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| 2011-03-24 |
Bruno Cardoso Lopes | Add asm parsing support w/ testcases for strex/ldrex... |
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| 2011-03-18 |
Owen Anderson | Thumb2 PC-relative loads require a fixup rather than... |
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| 2011-03-07 |
Bill Wendling | Rename the narrow shift right immediate operands to... |
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| 2011-03-01 |
Bill Wendling | Narrow right shifts need to encode their immediates... |
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| 2011-02-14 |
Bruno Cardoso Lopes | Fix encoding and add parsing support for the arm/thumb... |
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| 2011-02-04 |
Jason W Kim | Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation... |
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| 2011-01-26 |
NAKAMURA Takumi | TableGen: PointerLikeRegClass can be accepted to operand. |
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| 2011-01-18 |
Bruno Cardoso Lopes | Add support for parsing and encoding ARM's official... |
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| 2011-01-13 |
Owen Anderson | Add support to the ARM MC infrastructure to support... |
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| 2011-01-13 |
Evan Cheng | Model :upper16: and :lower16: as ARM specific MCTargetE... |
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| 2010-12-14 |
Jim Grosbach | Add support for MC-ized encoding of tLEApcrel and tLEAp... |
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| 2010-12-14 |
Bill Wendling | The tLDR et al instructions were emitting either a... |
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| 2010-12-14 |
Owen Anderson | Second attempt at make Thumb2 LEAs pseudos. This time... |
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| 2010-12-13 |
Owen Anderson | Revert r121721, which broke buildbots. |
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| 2010-12-13 |
Owen Anderson | Make Thumb2 LEA-like instruction into pseudos, which... |
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| 2010-12-13 |
Owen Anderson | In Thumb2, direct branches can be encoded as either... |
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| 2010-12-13 |
Chris Lattner | eliminate the Records global variable, patch by Garriso... |
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| 2010-12-10 |
Jim Grosbach | Thumb unconditional branch binary encoding. rdar:/... |
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| 2010-12-10 |
Jim Grosbach | Thumb conditional branch binary encodings. rdar://8745367 |
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| 2010-12-09 |
Jim Grosbach | Thumb needs a few different encoding schemes for branch... |
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| 2010-12-09 |
Bill Wendling | The BLX instruction is encoded differently than the... |
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| 2010-12-08 |
Bill Wendling | Support the "target" encodings for the CB[N]Z instructions. |
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| 2010-12-08 |
Bill Wendling | Add support for loading from a constant pool. |
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| 2010-12-06 |
Jim Grosbach | Add fixup for Thumb1 BL/BLX instructions. |
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| 2010-12-01 |
Jim Grosbach | Refactor LEApcrelJT as a pseudo-instructionlowered... |
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| 2010-11-30 |
Owen Anderson | Simplify the encoding of reg+/-imm12 values that allow... |
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| 2010-11-30 |
Owen Anderson | Add encoding support for Thumb2 PLD and PLI instructions. |
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| 2010-11-30 |
Bob Wilson | Fix the encoding of VLD4-dup alignment. |
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| 2010-11-18 |
Jason W Kim | Fix .o emission of ARM movt/movw. MCSymbolRefExpr:... |
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| 2010-11-17 |
Bill Wendling | Proper encoding for VLDM and VSTM instructions. The... |
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| 2010-11-11 |
Jim Grosbach | ARM fixup encoding for direct call instructions (BL). |
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| 2010-11-03 |
Jim Grosbach | Break ARM addrmode4 (load/store multiple base address... |
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| 2010-11-01 |
Chris Lattner | factor the operand list (and related fields/operations... |
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| 2010-10-27 |
Evan Cheng | Shifter ops are not always free. Do not fold them ... |
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| 2010-10-27 |
Owen Anderson | Provide correct encodings for NEON vcvt, which has... |
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| 2010-10-26 |
Jim Grosbach | First part of refactoring ARM addrmode2 (load/store... |
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| 2010-10-15 |
Jim Grosbach | ARM mode encoding information for UBFX and SBFX instruc... |
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| 2010-10-13 |
Jim Grosbach | Refactor the ARM 'setend' instruction pattern. Use... |
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| 2010-10-13 |
Jim Grosbach | Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH... |
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| 2010-10-12 |
Cameron Esfahani | Fix spelling error. |
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| 2010-10-05 |
Jim Grosbach | trailing whitespace |
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| 2010-09-08 |
Chris Lattner | fix bugs in push/pop segment support, rdar://8407242 |
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| 2010-09-01 |
Chris Lattner | remove dead code. |
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| 2010-08-16 |
Bob Wilson | Rename sat_shift operand to shift_imm, in preparation... |
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| 2010-08-12 |
Johnny Chen | Cleaned up the for-disassembly-only entries in the... |
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| 2010-08-11 |
Bob Wilson | Move the ARM SSAT and USAT optional shift amount operan... |
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| 2010-07-30 |
Jim Grosbach | Many Thumb2 instructions can reference the full ARM... |
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| 2010-07-20 |
Chris Lattner | remove option from tablegen for building static header. |
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| 2010-07-19 |
Bruno Cardoso Lopes | Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp... |
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| 2010-07-09 |
Bruno Cardoso Lopes | Start the support for AVX instructions with 256-bit... |
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| 2010-07-07 |
Chris Lattner | Implement the major chunk of PR7195: support for 'callw' |
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| 2010-06-23 |
Nico Weber | Add support for the x86 instructions "pusha" and "popa". |
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| 2010-06-15 |
Dale Johannesen | Next round of tail call changes. Register used in... |
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| 2010-06-11 |
Bob Wilson | Add instruction encoding for the Neon VMOV immediate... |
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| 2010-05-14 |
Evan Cheng | Added a QQQQ register file to model 4-consecutive Q... |
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| 2010-05-06 |
Sean Callanan | Eliminated the classification of control registers... |
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| 2010-05-06 |
Evan Cheng | Re-apply 103156 and 103157. 103156 didn't break anythin... |
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| 2010-04-23 |
Sean Callanan | Fixes to edis that mark x86 call targets as |
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| 2010-04-14 |
Benjamin Kramer | EDis: Don't include inttypes.h. We support compilers... |
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