[DAGCombine] Slightly improve lowering of BUILD_VECTOR into a shuffle.
[oota-llvm.git] / test / CodeGen /
2014-12-17 Michael Kuperstein[DAGCombine] Slightly improve lowering of BUILD_VECTOR...
2014-12-17 Toma Tabacu[mips] Set GCC-compatible MIPS asssembler options befor...
2014-12-17 Quentin Colombet[CodeGenPrepare] Reapply r224351 with a fix for the...
2014-12-17 Reid KlecknerRevert "[CodeGenPrepare] Move sign/zero extensions...
2014-12-16 Hans WennborgSelectionDAG switch lowering: use 'unsigned' to count...
2014-12-16 Sanjay Patelfix typo, add spaces; NFC
2014-12-16 Simon Pilgrim[X86][SSE] Vector double -> float conversion memory...
2014-12-16 Sanjay Patelmerge consecutive loads that are offset from a base...
2014-12-16 JF Bastienx86-32: PUSHF/POPF use/def EFLAGS
2014-12-16 Quentin Colombet[CodeGenPrepare] Move sign/zero extensions near loads...
2014-12-16 Robert Khasanov[AVX512] Enable integer arithmetic lowering for AVX512B...
2014-12-16 Sanjay Patelcombine consecutive subvector 16-byte loads into one...
2014-12-16 Daniel Sanders[mips] Fix arguments-struct.ll for Windows and OSX...
2014-12-16 Bradley Smith[ARM] Prevent PerformVCVTCombine from combining a vmul...
2014-12-16 Hal Finkel[PowerPC] Improve instruction selection bit-permuting...
2014-12-15 Simon PilgrimAdded missing tests for X86vzmovl folding. NFC.
2014-12-15 JF Bastienx86: Emit LOCK prefix after DATA16
2014-12-15 Duncan P. N. Exon... IR: Make metadata typeless in assembly
2014-12-15 Michael Kuperstein[X86] Break false dependencies before partial register...
2014-12-15 Elena DemikhovskyAVX-512: Added EXPAND instructions and intrinsics.
2014-12-14 Hal Finkel[PowerPC] Handle cmp op promotion for SELECT[_CC] nodes...
2014-12-13 Ahmed BougachaReapply "[ARM] Combine base-updating/post-incrementing...
2014-12-13 Renato GolinRevert "[ARM] Combine base-updating/post-incrementing...
2014-12-13 Akira HatanakaRename argument strings of codegen passes to avoid...
2014-12-12 Hal Finkel[PowerPC] Add a DAGToDAG peephole to remove unnecessary...
2014-12-12 Chad Rosier[ARMConstantIsland] Insert tbb/tbh optimization where...
2014-12-12 Robert Khasanov[AVX512] Enabling bit logic lowering
2014-12-12 Vasileios Kalintiris[mips] Enable code generation for MIPS-III.
2014-12-12 Robert Khasanov[AVX512] Enabling MIN/MAX lowering.
2014-12-12 Andrea Di BiagioReapply "[MachineScheduler] Fix for PR21807: minor...
2014-12-12 Vasileios Kalintiris[mips] Support SELECT nodes for targets that don't...
2014-12-12 Andrea Di BiagioRevert: [MachineScheduler] Fix for PR21807: minor code...
2014-12-12 Andrea Di Biagio[MachineScheduler] Fix for PR21807: minor code differen...
2014-12-12 Charlie TurnerEmit Tag_ABI_FP_16bit_format build attribute.
2014-12-12 Matt ArsenaultR600: Fix min/max matching problems with unordered...
2014-12-12 Matt ArsenaultR600/SI: Don't promote f32 select to i32
2014-12-12 Matt ArsenaultAdd target hook for whether it is profitable to reduce...
2014-12-11 Ahmed Bougacha[X86] Add a temporary testcase for PR21876/r223996.
2014-12-11 Hal Finkel[PowerPC] Better lowering for add/or of a FrameIndex
2014-12-11 Matt ArsenaultR600/SI: Use unordered equal instructions
2014-12-11 Matt ArsenaultR600/SI: Make more unordered comparisons legal
2014-12-11 Matt ArsenaultR600/SI: Use unordered not equal instructions
2014-12-11 Hal Finkel[PowerPC] Implement BuildSDIVPow2, lower i64 pow2 sdiv...
2014-12-11 Cameron McInally[AVX512] Add support for 512b variable bit shift intrin...
2014-12-11 Elena DemikhovskyAVX-512: Added all forms of COMPRESS instruction
2014-12-11 Jozef Kolek[mips][microMIPS] Implement CodeGen support for LI16...
2014-12-11 Michael KupersteinAdd newline missing in r224010.
2014-12-11 Michael Kuperstein[X86] When converting movs to pushes, don't assume...
2014-12-11 Elena DemikhovskyAVX-512: Fixed a bug in lowering setcc for MVT::i1...
2014-12-11 Duncan P. N. Exon... IR: Canonicalize metadata formatting, NFC
2014-12-10 Tim NorthoverARM: correctly expand LDR-lit based globals.
2014-12-10 Juergen Ributzka[AArch64] MachO large code-model: Materialize FP consta...
2014-12-10 Sanjay PatelMatch new shuffle codegen for MOVHPD patterns
2014-12-10 Michael Kuperstein[X86] Make a code path in EltsFromConsecutiveLoads...
2014-12-10 Ahmed Bougacha[ARM] Combine base-updating/post-incrementing vector...
2014-12-09 Ahmed Bougacha[ARM] Make testcase more explicit. NFC.
2014-12-09 Ahmed Bougacha[ARM] Also support v2f64 vld1/vst1.
2014-12-09 Juergen Ributzka[FastISel][AArch64] Fix a missing nullptr check in...
2014-12-09 Robert Khasanov[AVX512] Added lowering for VBROADCASTSS/SD instructions.
2014-12-09 Bill Schmidt[PowerPC 4/4] Enable little-endian support for VSX.
2014-12-09 Bill Schmidt[PowerPC 3/4] Little-endian adjustments for VSX vector...
2014-12-09 Bill SchmidtAdd test cases that were inadvertently omitted from...
2014-12-09 Juergen Ributzka[CodeGenPrepare] Split branch conditions into multiple...
2014-12-09 Bill Schmidt[PowerPC 1/4] Little-endian adjustments for VSX loads...
2014-12-09 Chandler Carruth[x86] Fix the test to actually test things for the...
2014-12-09 Chandler Carruth[x86] Add a test for the CPU names that should have...
2014-12-09 Michael Kuperstein[X86] Convert esp-relative movs of function arguments...
2014-12-09 Hal FinkelHandle early-clobber registers in the aggressive anti...
2014-12-08 Tom StellardMISched: Fix moving stores across barriers
2014-12-08 Hal Finkel[PowerPC] Don't use a non-allocatable register to imple...
2014-12-08 Bruno Cardoso Lopes[CompactUnwind] Fix register encoding logic
2014-12-08 Tim NorthoverAArch64: treat HFAs containing "half" types as blocks...
2014-12-08 Andrea Di Biagio[X86] Improved tablegen patters for matching TZCNT...
2014-12-08 Andrea Di Biagio[X86] Improved lowering of packed v8i16 vector shifts...
2014-12-07 Chandler Carruth[x86] Clean up the SSE1 test to use a slightly differen...
2014-12-07 Chandler Carruth[x86] Switch a constant selection test to use positive...
2014-12-07 Chandler Carruth[x86] Cleanup the combining vector shuffle tests a...
2014-12-07 Chandler Carruth[x86] Clean up the shift lowering vector shuffle tests...
2014-12-06 Tom StellardR600/SI: Restore PrivateGlobalPrefix to the default...
2014-12-06 Hans WennborgAdd a proper triple to switch-jump-table.ll
2014-12-06 NAKAMURA Takumillvm/test/CodeGen/X86/switch-jump-table.ll: Add explici...
2014-12-06 Ahmed Bougacha[X86] Refactor PMOV[SZ]Xrm to add missing AVX2 patterns.
2014-12-06 Hans WennborgSelectionDAG switch lowering: Replace unreachable defau...
2014-12-05 Sanjay PatelOptimize merging of scalar loads for 32-byte vectors...
2014-12-05 Jan Wen VoungUse 32-bit ebp for NaCl64 in a limited case: llvm.frame...
2014-12-05 Bill Seurer[PowerPC]Update Power VSX test cases to also test fast...
2014-12-05 Andrea Di Biagio[X86] Improved lowering of packed vector shifts to...
2014-12-05 Andrea Di Biagio[X86] Avoid introducing extra shuffles when lowering...
2014-12-05 Charlie TurnerAdd missing FP build attribute tests.
2014-12-05 Hal FinkelRevert "r223440 - Consider subregs when calling MI...
2014-12-05 Hal FinkelConsider subregs when calling MI::registerDefIsDead...
2014-12-04 Kevin EnderbyRe-add support to llvm-objdump for Mach-O universal...
2014-12-04 Weiming Zhao[AArch64] Combining Load and IntToFp should check for...
2014-12-04 Jonathan RoelofsFix thumbv4t indirect calls
2014-12-04 Michael Kuperstein[X86] Improve a dag-combine that handles a vector extra...
2014-12-04 Patrik HagglundUse DomTree in MachineSink to sink over diamonds.
2014-12-04 Elena DemikhovskyMasked Load / Store Intrinsics - the CodeGen part.
2014-12-04 Michael Liao[X86] Restore X86 base pointer after call to llvm.eh...
2014-12-04 Hal Finkel[PowerPC] 'cc' should be an alias only to 'cr0'
2014-12-03 Hal Finkel[PowerPC] Fix inline asm memory operands not to use r0
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