Add a TargetMachine hook that verifies DataLayout compatibility
[oota-llvm.git] / test / CodeGen /
2015-07-30 Alex LorenzMIR Serialization: Serialize the machine basic block...
2015-07-30 Vasileios Kalintiris[mips][FastISel] Remove hidden mips-fast-isel option.
2015-07-30 Vasileios Kalintiris[mips][FastISel] Apply only zero-extension to constants...
2015-07-29 Nick LewyckyFix typo "fuction" noticed in comments in AssumptionCac...
2015-07-29 Simon Pilgrim[X86][SSE] Keep 32-bit target i64 vector shifts on...
2015-07-29 Tim NorthoverAArch64: use 32-bit MOV rather than UBFX to truncate...
2015-07-29 Alex LorenzMIR Serialization: Serialize the frame info's save...
2015-07-29 Simon Pilgrim[X86][SSE] Vectorize i64 ASHR operations
2015-07-29 Jingyue WuRoll forward r242871
2015-07-29 Alex LorenzMIR Serialization: Serialize the '.cfi_def_cfa' CFI...
2015-07-29 Alex LorenzMIR Parser: Parse multiple LHS register machine operands.
2015-07-29 Bruno Cardoso LopesRevert "[PeepholeOptimizer] Look through PHIs to find...
2015-07-29 Jingyue WuTemporarily revert r242871
2015-07-29 Bill Schmidt[PPC] Fix PR24216: Don't generate splat for misaligned...
2015-07-29 Akira Hatanaka[AArch64] Define subtarget feature strict-align.
2015-07-28 Sanjay Patelignore duplicate divisor uses when transforming into...
2015-07-28 Alex LorenzMIR Serialization: Serialize the target index machine...
2015-07-28 Akira Hatanaka[ARM] Define subtarget feature strict-align.
2015-07-28 Tim NorthoverAArch64: be careful of large immediates when optimising...
2015-07-28 Bruno Cardoso Lopes[PeepholeOptimizer] Look through PHIs to find additiona...
2015-07-28 Vasileios Kalintiris[mips][FastISel] Fix call lowering by bailing out on...
2015-07-28 Chih-Hung HsiehFix typo.
2015-07-28 Chih-Hung HsiehLimit this test only on linux.
2015-07-28 Vasileios Kalintiris[mips][FastISel] Fix generated code for IR's select...
2015-07-28 Matt ArsenaultAMDGPU: Don't try to use LDS/vector for private if...
2015-07-28 Matt ArsenaultAMDGPU: Fix crash if called function is a bitcast
2015-07-28 Alex LorenzAdd a test case for r242191 ([MMX] Use the appropriate...
2015-07-28 Chih-Hung HsiehMove unit tests to target specific directories.
2015-07-28 Alex LorenzMIR Serialization: Serialize the block address machine...
2015-07-28 Sanjay Pateladd tests to show broken current behavior of minsize...
2015-07-28 Chih-Hung HsiehImplement target independent TLS compatible with glibc...
2015-07-28 Geoff Berry[AArch64] Match float round and convert to int instruct...
2015-07-28 Adhemerval ZanellaImplement __builtin_thread_pointer
2015-07-28 Simon Pilgrim[X86][SSE] Use bitmasks instead of shuffles where possible.
2015-07-28 Igor BregerAVX512: Implemented encoding and intrinsics for VGETEXP...
2015-07-28 Sanjay Patelfix invalid load folding with SSE/AVX FP logical instru...
2015-07-27 JF BastienWebAssembly: add a generic CPU
2015-07-27 NAKAMURA TakumiTweak llvm/test/CodeGen/X86/virtual-registers-cleared...
2015-07-27 Alex LorenzMIR Serialization: Serialize the unnamed basic block...
2015-07-27 Simon Pilgrim[X86][SSE] Added shuffle tests to demonstrate missed...
2015-07-27 Alex LorenzMIR Serialization: Serialize the '.cfi_def_cfa_register...
2015-07-27 Bruno Cardoso LopesRevert "[PeepholeOptimizer] Look through PHIs to find...
2015-07-27 Akira Hatanaka[AArch64] Remove check for Darwin that was needed to...
2015-07-27 Juergen Ributzka[AArch64][FastISel] Add more truncation tests.
2015-07-27 Marek OlsakAMDGPU: don't match vgpr loads for constant loads
2015-07-27 Alex LorenzReset the virtual registers in liveins when clearing...
2015-07-27 Alex LorenzMIR Serialization: Serialize the machine function's...
2015-07-27 Bruno Cardoso Lopes[PeepholeOptimizer] Look through PHIs to find additiona...
2015-07-27 Marek OlsakAMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
2015-07-26 Simon Pilgrim[X86][SSE] Refreshed vector bit count tests.
2015-07-26 Simon Pilgrim[X86][AVX2] Refreshed avx2 conversion tests
2015-07-26 Igor BregerImplemented encoding and intrinsics of the following...
2015-07-25 Simon Pilgrim[X86][SSE] Added additional vector sign/zero load exten...
2015-07-25 Simon Pilgrim[X86][SSE] Added additional vector sign/zero extension...
2015-07-25 Juergen Ributzka[AArch64][FastISel] Always use an AND instruction when...
2015-07-25 Eric ChristopherFix PPCMaterializeInt to check the size of the integer...
2015-07-25 Akira Hatanaka[AArch64] Define subtarget feature "reserve-x18", which...
2015-07-24 Duncan P. N. Exon... DI/Verifier: Fix argument bitrot in DILocalVariable
2015-07-24 Alex LorenzMIR Serialization: Serialize MachineFrameInfo's callee...
2015-07-24 Alex LorenzMIR Serialization: Serialize the simple virtual registe...
2015-07-24 Alex LorenzMIR Parser: Run the machine verifier after initializing...
2015-07-24 Alex LorenzMIR Tests: Add liveins and successors to make tests...
2015-07-24 Alex LorenzMIR Tests: Make the basic block successor test an X86...
2015-07-24 Igor BregerAVX-512: Implemented encoding , DAG lowering and intrin...
2015-07-24 Luke Cheeseman[ARM] - Fix lowering of shufflevectors in AArch32
2015-07-24 Luke CheesemanWhen lowering vector shifts a check is performed to...
2015-07-24 Eric ChristopherClean up function attributes on PPC fast-isel tests.
2015-07-23 Alex LorenzMIR Serialization: Serialize the '.cfi_offset' CFI...
2015-07-23 JF BastienWebAssembly: test that valid -mcpu flags are accepted.
2015-07-23 Sanjay Patelfix crash in machine trace metrics due to processing...
2015-07-23 Weiming ZhaoThis patch eanble register coalescing to coalesce the...
2015-07-23 Michael Kuperstein[X86] Allow load folding into PUSH instructions
2015-07-23 Elena DemikhovskyX86: Fixed assertion failure in 32-bit mode
2015-07-23 Chandler CarruthRevert r242990: "AVX-512: Implemented encoding , DAG...
2015-07-23 Igor BregerAVX-512: Implemented encoding , DAG lowering and intrin...
2015-07-23 Igor BregerAVX : Fix ISA disabling in case AVX512VL , some instruc...
2015-07-22 JF BastienWebAssembly: basic bitcode → assembly CodeGen test
2015-07-22 Alex LorenzMIR Serialization: Serialize the machine instruction...
2015-07-22 Alex LorenzMIR Serialization: Serialize the metadata machine operands.
2015-07-22 Quentin Colombet[ARM] Make the frame lowering code ready for shrink...
2015-07-22 Asaf Badouh[X86][AVX512] add reduce/range/scalef/rndScale
2015-07-22 Elena DemikhovskyAVX-512: Added intrinsics for VCVT* instructions.
2015-07-22 Jingyue Wu[BranchFolding] do not iterate the aliases of virtual...
2015-07-21 Alex LorenzMIR Serialization: Start serializing the CFI operands...
2015-07-21 Bill Schmidt[PPC64LE] More vector swap optimization TLC
2015-07-21 Alex LorenzMIR Serialization: Serialize the external symbol machin...
2015-07-21 Igor BregerAVX512 : Implemented VPMADDUBSW and VPMADDWD instruction ,
2015-07-21 Akira Hatanaka[ARM] Define subtarget feature "reserve-r9", which...
2015-07-21 Matthias BraunARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor...
2015-07-21 Matthias BraunARMLoadStoreOptimizer: Create LDRD/STRD on thumb2
2015-07-20 Akira HatanakaRevert r242737.
2015-07-20 Akira Hatanaka[ARM] Define subtarget feature "reserve-r9", which...
2015-07-20 Matthias BraunRevert "ARMLoadStoreOptimizer: Create LDRD/STRD on...
2015-07-20 Matthias BraunRevert "ARMLoadStoreOpt: Merge subs/adds into LDRD...
2015-07-20 JF BastienTargets: commonize some stack realignment code
2015-07-20 Matthias BraunAArch64: Add aditional Cyclone macroop fusion opportunities
2015-07-20 Matthias BraunMachineScheduler: Restrict macroop fusion to data-depen...
2015-07-20 Quentin Colombet[ARM] Refactor the prologue/epilogue emission to be...
2015-07-20 Jingyue Wu[NVPTX] make load on global readonly memory to use ldg
2015-07-20 Krzysztof Parzyszek[Hexagon] Generate MUX from conditional transfers when...
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