Lower thumbv4t & thumbv5 lo->lo copies through a push-pop sequence
[oota-llvm.git] / test / CodeGen / R600 /
2014-08-15 Matt ArsenaultR600/SI: Move all fabs / fneg handling to patterns
2014-08-15 Matt ArsenaultR600/SI: Use source modifiers for f64 fneg
2014-08-15 Matt ArsenaultR600/SI: Use source modifier for f64 fabs
2014-08-15 Matt ArsenaultR600/SI: Fix offset folding in some cases with shifted...
2014-08-15 Matt ArsenaultR600/SI: Add intrinsic for ldexp
2014-08-15 Matt ArsenaultR600/SI: Implement isLegalAddressingMode
2014-08-13 Matt ArsenaultR600: Correctly set the src value offset for scalarized...
2014-08-13 Hal FinkelFix classof for ISD::INTRINSIC_W_CHAIN and INTRINSIC_VOID
2014-08-12 Jan VeselyR600: Use optimized 24bit path in udivrem
2014-08-12 Jan VeselyR600: Use i24 optimized path for SREM
2014-08-11 Tom StellardR600/SI: Add a ComplexPattern for selecting MUBUF _OFFS...
2014-08-11 Tom StellardR600/SI: Add check for low 32 bits of encoding to mubuf...
2014-08-11 Tom StellardR600/SI: Clear lds bit on MUBUF instructions used for...
2014-08-11 Tom StellardR600/SI: Fix broken test
2014-08-09 Tom StellardR600/SI: Custom lower CONCAT_VECTORS
2014-08-09 Tom StellardR600/SI: Update concat_vectors.ll to check for scratch...
2014-08-06 Matt ArsenaultR600: Cleanup fadd and fsub tests
2014-08-06 Matt ArsenaultR600: Increase nearby load scheduling threshold.
2014-08-06 Matt ArsenaultR600/SI: Implement areLoadsFromSameBasePtr
2014-08-05 Tom StellardR600/SI: Update MUBUF assembly string to match AMD...
2014-08-05 Tom StellardR600/SI: Avoid generating REGISTER_LOAD instructions.
2014-08-03 Matt ArsenaultR600/SI: Fix extra whitespace in asm str
2014-08-02 Matt ArsenaultR600: Cleanup fneg tests
2014-08-01 Tom StellardRevert "R600: Move code for generating REGISTER_LOAD...
2014-08-01 Tom StellardR600: Move code for generating REGISTER_LOAD into R600I...
2014-08-01 Matt ArsenaultR600: Cleanup test
2014-08-01 Tom StellardR600/SI: Do abs/neg folding with ComplexPatterns
2014-08-01 Tom StellardR600/SI: Fold immediates when shrinking instructions
2014-08-01 Tom StellardR600/SI: Fix incorrect commute operation in shrink...
2014-07-31 Jan VeselyR600: Modernize work item intrinsics test
2014-07-28 Matt ArsenaultR600: Modernize test
2014-07-28 Matt ArsenaultR600/SI: Implement getOptimalMemOpType
2014-07-27 Matt ArsenaultAdd alignment value to allowsUnalignedMemoryAccess
2014-07-26 Matt ArsenaultR600/SI: Fix broken test.
2014-07-26 Chandler Carruth[SDAG] When performing post-legalize DAG combining...
2014-07-24 Chandler Carruth[SDAG] Introduce a combined set to the DAG combiner...
2014-07-24 Matt ArsenaultR600: Add FMA instructions for Evergreen
2014-07-24 Matt ArsenaultR600: Match rcp node on pre-SI
2014-07-24 Matt ArsenaultR600: Fix LowerSDIV24
2014-07-23 Chandler Carruth[SDAG] Make the DAGCombine worklist not grow endlessly...
2014-07-21 Tom StellardR600/SI: Add instruction shrinking pass
2014-07-21 Tom StellardR600/SI: Clean up some of the unused REGISTER_{LOAD...
2014-07-21 Tom StellardR600/SI: Use scratch memory for large private arrays
2014-07-21 Tom StellardR600/SI: Store constant initializer data in constant...
2014-07-21 Tom StellardR600/SI: Use VALU for i1 XOR
2014-07-20 Matt ArsenaultR600: Add missing test for concat_vectors
2014-07-20 Matt ArsenaultR600/SI: Remove dead code and add missing tests.
2014-07-19 Matt ArsenaultR600/SI: implement range reduction for sin/cos
2014-07-18 Tim NorthoverR600: support fpext/fptrunc operations to and from...
2014-07-18 Tim NorthoverCodeGen: soften f16 type by default instead of marking...
2014-07-18 Tim NorthoverR600: rename misleading fp16 test.
2014-07-18 Tim NorthoverR600: support f16 -> f64 conversion intrinsic.
2014-07-17 Tim NorthoverCodeGen: extend f16 conversions to permit types > float.
2014-07-15 Matt ArsenaultR600/SI: Allow using f32 rcp / rsq when denormals not...
2014-07-15 Matt ArsenaultR600/SI: Fix select on i1
2014-07-15 Matt ArsenaultR600/SI: Implement less wrong f32 fdiv
2014-07-15 Jan VeselyR600: Implement zero undef variants of ctlz/cttz
2014-07-15 Matt ArsenaultR600: Add dag combine for copy of an illegal type.
2014-07-14 Matt ArsenaultR600: Add denormal handling subtarget features.
2014-07-14 Matt ArsenaultR600/SI: Default to no single precision denormals.
2014-07-13 Matt ArsenaultR600: Run more tests with promote alloca disabled.
2014-07-13 Matt ArsenaultR600: Run private-memory test with and without alloca...
2014-07-12 Matt ArsenaultR600: Add missing tests for some intrinsics
2014-07-11 Marek OlsakR600/SI: Use i32 vectors for resources and samplers
2014-07-11 Marek OlsakR600/SI: add sample and image intrinsics exposing all...
2014-07-10 Jan VeselyR600: Implement float to long/ulong
2014-07-10 Matt ArsenaultRevert "Revert r212640, "Add trunc (select c, a, b...
2014-07-10 NAKAMURA TakumiRevert r212640, "Add trunc (select c, a, b) -> select...
2014-07-10 Matt ArsenaultR600/SI: Add support for llvm.convert.{to|from}.fp16
2014-07-09 Matt ArsenaultAdd trunc (select c, a, b) -> select c (trunc a), ...
2014-07-07 Matt ArsenaultR600: Fix mishandling of load / store chains.
2014-07-02 Tom StellardR600: Promote i64 loads to v2i32
2014-06-27 Matt ArsenaultRevert "Temporary hack to try cleaning extra .s file...
2014-06-27 Matt ArsenaultTemporary hack to try cleaning extra .s file from bots.
2014-06-27 David BlaikieFix test so it doesn't try to write out temporary files...
2014-06-27 Matt ArsenaultR600: Don't crash on unhandled instruction in promote...
2014-06-27 Matt ArsenaultR600: Add some testcases for promote alloca pass.
2014-06-26 Matt ArsenaultR600/SI: Add FP mode bits to binary.
2014-06-26 Matt ArsenaultR600: Fix vector FMA
2014-06-24 Tom StellardR600: Promote i64 stores to v2i32
2014-06-24 Matt ArsenaultR600: Fix inconsistency in rsq instructions.
2014-06-23 Matt ArsenaultR600/SI: Fix div_scale intrinsic.
2014-06-23 Matt ArsenaultR600: Move add/sub with overflow out of AMDILISelLowering
2014-06-23 Matt ArsenaultR600/SI: Handle i64 sub.
2014-06-22 Jan VeselyR600: Add udivrem test
2014-06-20 Tom StellardR600/SI: Add patterns for ctpop inside a branch
2014-06-20 Tom StellardR600/SI: Add a pattern for f32 ftrunc
2014-06-20 Tom StellardR600: Expand vector flog2
2014-06-20 Tom StellardR600: Expand vector fexp2
2014-06-20 Tom StellardR600/SI: Add a VALU pattern for i64 xor
2014-06-19 Matt ArsenaultR600: Add a few tests I forgot to add.
2014-06-19 Matt ArsenaultR600/SI: Add intrinsics for various math instructions.
2014-06-18 Matt ArsenaultR600: Handle fnearbyint
2014-06-18 Marek OlsakR600/SI: add gather4 and getlod intrinsics (v3)
2014-06-18 Jan VeselyR600: Expand vector fceil
2014-06-18 Matt ArsenaultR600/SI: Add intrinsics for brev instructions
2014-06-18 Matt ArsenaultR600/SI: Prettier operand printing for 64-bit ops.
2014-06-18 Matt ArsenaultR600: Implement f64 ftrunc, ffloor and fceil.
2014-06-18 Matt ArsenaultR600: Custom lower f64 frint for pre-CI
2014-06-18 Jan VeselyR600: Implement 64bit SRA
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