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[FastISel][AArch64] Optimize compare-and-branch for i1 to use 'tbz'.
[oota-llvm.git]
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test
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CodeGen
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NVPTX
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vector-loads.ll
2013-03-20
Justin Holewinski
Propagate DAG node ordering during type legalization...
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2013-02-12
Justin Holewinski
[NVPTX] Disable vector registers
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