R600/SI: Don't assert on exotic operand types
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2014-09-26 Matt ArsenaultR600/SI: Don't assert on exotic operand types
2014-09-26 Matt ArsenaultR600/SI: Fix using wrong operand indices when commuting
2014-09-26 Matt ArsenaultR600/SI: Remove apparently dead code in legalizeOperands
2014-09-26 Chandler Carruth[x86] The mnemonic is SHUFPS not SHUPFS. =[ I'm very...
2014-09-26 Chandler Carruth[x86] In the new vector shuffle lowering, when trying...
2014-09-26 Chandler Carruth[x86] Fix a large collection of bugs that crept in...
2014-09-26 Renato GolinElide repeated register operand in Thumb1 instructions
2014-09-26 Andrea Di Biagio[X86][SchedModel] SSE reciprocal square root instructio...
2014-09-26 Daniel SandersFix unused variable warning added in r218509
2014-09-26 Daniel Sanders[mips] Generalize the handling of f128 return values...
2014-09-26 Robert Khasanov[AVX512] Added load/store from BW/VL subsets to Registe...
2014-09-26 David MajnemerFix build breakage on MSVC 2013
2014-09-26 David MajnemerTarget: Fix build breakage.
2014-09-26 Eric ChristopherAdd the first backend support for on demand subtarget...
2014-09-26 Eric ChristopherMove resetTargetOptions from taking a MachineFunction...
2014-09-26 Matt ArsenaultR600/SI: Fix emitting trailing whitespace after s_waitcnt
2014-09-26 Adam Nemet[AVX512] Simplify use of !con()
2014-09-25 Adam Nemet[AVX512] Pull pattern for subvector extract into the...
2014-09-25 Adam Nemet[AVX512] Refactor subvector extracts
2014-09-25 Adam Nemet[AVX512] Fix typo
2014-09-25 Tom StellardARM: Remove unneeded check for MI->hasPostISelHook()
2014-09-25 Tom StellardR600/SI: Add support for global atomic add
2014-09-25 Robin MorissetLower idempotent RMWs to fence+load
2014-09-25 Sid ManningAdd missing attributes !cmp.[eq,gt,gtu] instructions.
2014-09-25 Daniel SandersAdd llvm_unreachables() for [ASZ]ExtUpper to X86FastISe...
2014-09-25 Daniel Sanders[mips] Add CCValAssign::[ASZ]ExtUpper and CCPromoteToUp...
2014-09-25 Renato GolinAdd aliases for VAND imm to VBIC ~imm
2014-09-25 Chandler Carruth[x86] Teach the new vector shuffle lowering to use...
2014-09-25 Chandler Carruth[x86] Teach the new vector shuffle lowering a fancier...
2014-09-25 Oliver Stannard[Thumb2] BXJ should be undefined for v7M, v8A
2014-09-25 Chandler Carruth[x86] Fix an oversight in the v8i32 path of the new...
2014-09-25 Chandler Carruth[x86] Rearrange the code for v16i16 lowering a bit...
2014-09-25 Chandler Carruth[x86] Implement AVX2 support for v32i8 in the new vecto...
2014-09-25 Chandler Carruth[x86] Remove the defunct X86ISD::BLENDV entry -- we...
2014-09-25 Chandler Carruth[x86] Fix the v16i16 blend logic I added in the prior...
2014-09-25 Akira Hatanaka[X86,AVX] Add an isel pattern for X86VBroadcast.
2014-09-25 Chandler Carruth[x86] Implement v16i16 support with AVX2 in the new...
2014-09-24 Chandler Carruth[x86] Factor out the logic to generically decombose...
2014-09-24 Moritz Roth[Thumb] Make load/store optimizer less conservative.
2014-09-24 Oliver Stannard[Thumb] 32-bit encodings of 'cps' are not valid for v7M
2014-09-24 Aaron BallmanSilencing an "enumeral and non-enumeral type in conditi...
2014-09-24 Chandler Carruth[x86] Teach the instruction lowering to add comments...
2014-09-24 Chandler Carruth[x86] More refactoring of the shuffle comment emission...
2014-09-24 Chandler Carruth[x86] Bypass the shuffle mask comment generation when...
2014-09-24 Chandler Carruth[x86] Hoist the logic for extracting the relevant bits...
2014-09-24 Matt ArsenaultR600/SI: Add new helper isSGPRClassID
2014-09-24 Matt ArsenaultR600/SI: Fix hardcoded and wrong operand numbers.
2014-09-24 Matt ArsenaultR600/SI: Enable named operand table for SALU instructions
2014-09-24 Chandler Carruth[x86] Start refactoring the comment printing logic...
2014-09-24 Tom StellardR600/SI: Enable selecting SALU inside branches
2014-09-24 Tom StellardR600/SI: Move PHIs that define SGPRs to the VALU in...
2014-09-24 Tom StellardR600/SI: Fix the FixSGPRLiveRanges pass
2014-09-24 Tom StellardR600/SI: Mark EXEC_LO and EXEC_HI as reserved
2014-09-24 Tom StellardR600/SI: Fix SIRegisterInfo::getPhysRegSubReg()
2014-09-24 Tom StellardR600/SI: Implement VGPR register spilling for compute...
2014-09-24 Chandler Carruth[x86] Teach the new vector shuffle lowering to lower...
2014-09-24 Chandler Carruth[x86] Fix a really terrible bug in the repeated 128...
2014-09-23 Chandler Carruth[x86] Teach the new vector shuffle lowering to lower...
2014-09-23 Jim GrosbachAArch64: allow constant expressions for shifted reg...
2014-09-23 Chandler Carruth[x86] Teach the rest of the 'target shuffle' machinery...
2014-09-23 Tom StellardR600/SI: Clean up checks for legality of immediate...
2014-09-23 Robin Morisset[X86] Make wide loads be managed by AtomicExpand
2014-09-23 Robin Morisset[Power] Use AtomicExpandPass for fence insertion, and...
2014-09-23 Robin MorissetAdd AtomicExpandPass::bracketInstWithFences, and use...
2014-09-23 Lang Hames[MCJIT] Remove PPCRelocations.h - it's no longer used.
2014-09-23 Robin MorissetJust add a fixme about a possibly faster implementation...
2014-09-23 Matt ArsenaultFix typo
2014-09-23 Chandler Carruth[x86] Teach the new shuffle lowering's blend functional...
2014-09-23 Lang Hames[MCJIT] Nuke MachineRelocation and MachineCodeEmitter...
2014-09-23 Oliver StannardFix segfault in AArch64 backend with -g and -mbig-endian
2014-09-23 Sid ManningLoop instead of individual def's for each GPR.
2014-09-23 Chandler Carruth[x86] Teach the vector comment parsing and printing...
2014-09-23 Chandler Carruth[x86] Teach the AVX1 path of the new vector shuffle...
2014-09-22 Chandler Carruth[x86] Rename X86ISD::VPERMILP to X86ISD::VPERMILPI...
2014-09-22 Kaelyn TakataFix a "typo" from my previous commit.
2014-09-22 Kaelyn TakataSilence unused variable warnings in the new stub functi...
2014-09-22 Chandler Carruth[x86] Stub out the integer lowering of 256-bit vectors...
2014-09-22 Juergen Ributzka[FastISel][AArch64] Also allow folding of sign-/zero...
2014-09-22 Ehsan Akhgarims-inline-asm: Fix parsing label names inside bracket...
2014-09-22 Sanjay PatelUse broadcasts to optimize overall size when loading...
2014-09-22 Tom StellardRevert "R600/SI: Add support for global atomic add"
2014-09-22 Tom StellardR600/SI: Add support for global atomic add
2014-09-22 Tom StellardR600/SI: Remove modifier operands from V_CNDMASK_B32_e64
2014-09-22 Tom StellardR600: Don't set BypassSlowDiv for 64-bit division
2014-09-22 Tom StellardR600/SI: Use ISD::MUL instead of ISD::UMULO when loweri...
2014-09-22 Tom StellardR600/SI: Add enums for some hard-coded values
2014-09-22 Pavel Chupin[x32] Fix segmented stacks support
2014-09-22 Robert LougherFix assert when decoding PSHUFB mask
2014-09-22 Ehsan Akhgarims-inline-asm: Add a sema callback for looking up label...
2014-09-22 Chandler Carruth[x86] Back out a bad choice about lowering v4i64 and...
2014-09-21 Chandler Carruth[x86] Teach the new vector shuffle lowering how to...
2014-09-21 Matt ArsenaultFix typo
2014-09-21 Matt ArsenaultUse llvm_unreachable instead of assert(!)
2014-09-21 Matt ArsenaultR600/SI: Don't use strings for single characters
2014-09-21 Sanjay PatelRefactor reciprocal square root estimate into target...
2014-09-21 Chandler Carruth[x86] With the stronger canonicalization of shuffles...
2014-09-21 Chandler Carruth[x86] Teach the new vector shuffle lowering to re-use...
2014-09-21 Chandler Carruth[x86] Refactor the logic to form SHUFPS instruction...
2014-09-21 Chandler Carruth[x86] Teach the new vector shuffle lowering the basics...
2014-09-21 Chandler Carruth[x86] Teach the new vector shuffle lowering how to...
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