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Target RegisterInfo: devirtualize TargetFrameLowering
[oota-llvm.git]
/
lib
/
Target
/
XCore
/
XCoreInstrFormats.td
2013-02-17
Richard Osborne
[XCore] Add missing 2r instructions.
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2013-02-17
Richard Osborne
[XCore] Add TSETR instruction.
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2013-01-25
Richard Osborne
Add instruction encodings / disassembly support for...
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2013-01-25
Richard Osborne
Add instruction encodings / disassembly support for...
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2013-01-23
Richard Osborne
Add instruction encodings / disassembly support for...
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2013-01-22
Richard Osborne
Add instruction encodings / disassembly support for...
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2013-01-21
Richard Osborne
Add instruction encodings / disassembly support for...
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2013-01-21
Richard Osborne
Add instruction encoding / disassembly support for...
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2013-01-20
Richard Osborne
Add instruction encodings / disassembly support for...
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2013-01-20
Richard Osborne
Add instruction encodings / disassembly support for...
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2013-01-20
Richard Osborne
Add instruction encodings / disassembler support for...
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2013-01-20
Richard Osborne
Add instruction encodings / disassembly support 3r...
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2012-12-17
Richard Osborne
Add instruction encodings / disassembly support for...
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2012-12-17
Richard Osborne
Add instruction encodings / disassembly support for...
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2012-12-17
Richard Osborne
Add instruction encodings / disassembly support for...
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2012-12-17
Richard Osborne
Add instruction encodings / disassembly support for...
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2012-12-16
Richard Osborne
Add instruction encodings and disassembly for 1r instru...
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2012-12-16
Richard Osborne
Remove invalid instruction encodings.
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2012-12-16
Richard Osborne
Mark anything deriving from PseudoInstXCore as a pseudo...
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2012-12-16
Richard Osborne
Set instruction size correctly in XCoreInstrFormats.td
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2012-02-18
Jia Liu
Emacs-tag and some comment fix for all ARM, CellSPU...
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2008-11-07
Richard Osborne
Add XCore backend.
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projects / oota-llvm.git / history