| 2007-03-21 |
Evan Cheng | Mark re-materializable instructions. |
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| 2007-01-26 |
Jim Laskey | Make LABEL a builtin opcode. |
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| 2007-01-24 |
Chris Lattner | Fix a misencoding of CBW and CWD. This fixes PR1030. |
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| 2006-12-05 |
Evan Cheng | - Switch X86-64 JIT to large code size model. |
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| 2006-11-30 |
Evan Cheng | - Use a different wrapper node for RIP-relative GV... |
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| 2006-11-29 |
Evan Cheng | Custom lower READCYCLECOUNTER for x86-64. |
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| 2006-11-03 |
Chris Lattner | remove dead/redundant vars |
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| 2006-10-30 |
Reid Spencer | Add debug support for X86/ELF targets (Linux). This... |
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| 2006-10-13 |
Evan Cheng | Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using... |
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| 2006-10-12 |
Chris Lattner | Move the Imp tblgen class from the X86 backend to commo... |
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| 2006-10-12 |
Chris Lattner | Mark ADJCALLSTACKUP/DOWN as clobbering ESP so that... |
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| 2006-10-11 |
Evan Cheng | Add properties to ComplexPattern. |
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| 2006-10-09 |
Evan Cheng | Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. |
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| 2006-09-22 |
Evan Cheng | Delete dead code; fix 80 col violations. |
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| 2006-09-11 |
Evan Cheng | X86ISD::CMP now produces a chain as well as a flag... |
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| 2006-09-08 |
Evan Cheng | Committing X86-64 support. |
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| 2006-09-07 |
Chris Lattner | Eliminate X86ISD::TEST, using X86ISD::CMP instead.... |
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| 2006-09-07 |
Evan Cheng | Consistency. |
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| 2006-08-11 |
Evan Cheng | CALLSEQ_* produces chain even if that's not needed. |
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| 2006-07-20 |
Evan Cheng | Clean up. |
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| 2006-07-19 |
Evan Cheng | INC / DEC instructions have shorter code size than... |
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| 2006-07-11 |
Evan Cheng | Emit inc / dec of registers as one byte instruction. |
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| 2006-06-29 |
Evan Cheng | Add shift and rotate by 1 instructions / patterns. |
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| 2006-06-27 |
Evan Cheng | Remove dead code. |
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| 2006-06-14 |
Evan Cheng | X86 call instructions can take variable number of opera... |
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| 2006-06-02 |
Evan Cheng | Incorrect AT&T opcode. |
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| 2006-05-31 |
Evan Cheng | Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. |
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| 2006-05-31 |
Evan Cheng | Sign extender |
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| 2006-05-30 |
Evan Cheng | A addressing mode folding enhancement: |
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| 2006-05-20 |
Evan Cheng | Remove unused patterns. |
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| 2006-05-19 |
Evan Cheng | - Use exact-width integer types, e.g. int32_t, to avoid... |
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| 2006-05-19 |
Evan Cheng | Explicitly specify MOV32mi can only be used store 32... |
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| 2006-05-17 |
Evan Cheng | Use generic iPTR instead i32 to represent pointer type. |
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| 2006-05-16 |
Evan Cheng | X86 integer register classes naming changes. Make them... |
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| 2006-05-08 |
Evan Cheng | Fixing truncate. Previously we were emitting truncate... |
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| 2006-05-05 |
Evan Cheng | Need extload patterns after Chris' DAG combiner changes |
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| 2006-05-05 |
Evan Cheng | Better implementation of truncate. ISel matches it... |
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| 2006-04-27 |
Evan Cheng | Make x86 isel lowering produce tailcall nodes. They... |
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| 2006-04-22 |
Nate Begeman | Optimized stores to the constant pool, while cool,... |
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| 2006-04-22 |
Nate Begeman | JumpTable support! What this represents is working... |
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| 2006-04-03 |
Evan Cheng | - More efficient extract_vector_elt with shuffle and... |
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| 2006-03-25 |
Evan Cheng | Added missing (any_extend (load ...)) patterns. |
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| 2006-03-23 |
Chris Lattner | Fix the encodings of these new instructions, hopefully... |
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| 2006-03-23 |
Nate Begeman | Add support for 8 bit immediates with 16/32 bit cmp... |
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| 2006-03-18 |
Evan Cheng | Use the generic vector register classes VR64 / VR128... |
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| 2006-03-17 |
Evan Cheng | Move some pattern fragments to the right files. |
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| 2006-03-17 |
Evan Cheng | - Nuke 16-bit SBB instructions. We'll never use them. |
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| 2006-03-07 |
Evan Cheng | X86ISD::REP_STOS and X86ISD::REP_MOVS now produces... |
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| 2006-03-07 |
Evan Cheng | Enable Dwarf debugging info. |
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| 2006-03-03 |
Chris Lattner | remove the read/write port/io intrinsics. |
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| 2006-02-25 |
Evan Cheng | * Allow mul, shl nodes to be codegen'd as LEA (if appro... |
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| 2006-02-23 |
Evan Cheng | - Clean up the lowering and selection code of ConstantP... |
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| 2006-02-23 |
Evan Cheng | PIC related bug fixes. |
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| 2006-02-22 |
Evan Cheng | Added MMX, SSE1, and SSE2 vector instructions and some... |
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| 2006-02-21 |
Evan Cheng | One more round of reorg so sabre doesn't freak out... |
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| 2006-02-21 |
Evan Cheng | A big more cleaning up. |
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| 2006-02-21 |
Evan Cheng | Moving things to their proper places. |
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| 2006-02-21 |
Evan Cheng | Split instruction info into multiple files, one for... |
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| 2006-02-21 |
Evan Cheng | Added separate alias instructions for SSE logical ops... |
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| 2006-02-21 |
Evan Cheng | Added MMX and XMM packed integer move instructions... |
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| 2006-02-20 |
Evan Cheng | Added x86 integer vector types: 64-bit packed byte... |
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| 2006-02-18 |
Evan Cheng | Added fisttp for fp to int conversion. |
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| 2006-02-18 |
Evan Cheng | x86 / Darwin PIC support. |
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| 2006-02-17 |
Nate Begeman | kill ADD_PARTS & SUB_PARTS and replace them with fancy... |
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| 2006-02-16 |
Evan Cheng | pxor (for FLD0SS) encoding was missing the OpSize prefix. |
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| 2006-02-16 |
Evan Cheng | 1. Use pxor instead of xoraps / xorapd to clear FR32... |
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| 2006-02-16 |
Evan Cheng | MOVAPSrr and MOVAPDrr instruction format should be... |
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| 2006-02-15 |
Evan Cheng | cvtsd2ss / cvtss2sd encoding bug. |
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| 2006-02-15 |
Evan Cheng | movaps, movapd encoding bug. |
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| 2006-02-06 |
Chris Lattner | Eliminate the printCallOperand method, using a 'call... |
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| 2006-02-04 |
Evan Cheng | Remove an unnecessary predicate. |
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| 2006-02-04 |
Evan Cheng | Separate FILD and FILD_FLAG, the later is only used... |
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| 2006-02-01 |
Evan Cheng | Rearrange code to my liking. :) |
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| 2006-02-01 |
Evan Cheng | - Use xor to clear integer registers (set R, 0). |
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| 2006-01-31 |
Evan Cheng | - Allow XMM load (for scalar use) to be folded into... |
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| 2006-01-31 |
Chris Lattner | * Fix 80-column violations |
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| 2006-01-31 |
Evan Cheng | Added custom lowering of fabs |
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| 2006-01-30 |
Evan Cheng | Always use FP stack instructions to perform i64 to... |
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| 2006-01-29 |
Chris Lattner | The FP stack doesn't support UNDEF, ask the legalizer... |
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| 2006-01-27 |
Evan Cheng | AT&T assembly convention: registers are in lower case. |
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| 2006-01-27 |
Evan Cheng | x86 CPU detection and proper subtarget support |
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| 2006-01-27 |
Chris Lattner | PHI and INLINEASM are now built-in instructions provide... |
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| 2006-01-26 |
Evan Cheng | Remove the uses of STATUS flag register. Rely on node... |
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| 2006-01-24 |
Chris Lattner | Emit the copies out of call return registers *after... |
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| 2006-01-21 |
Evan Cheng | Rename fcmovae to fcmovnb and fcmova to fcmovnbe (follo... |
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| 2006-01-20 |
Evan Cheng | A few more SH{L|R}D peepholes. |
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| 2006-01-19 |
Evan Cheng | Added i16 SH{L|R}D patterns. |
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| 2006-01-19 |
Evan Cheng | adc and sbb need an incoming flag to ensure it reads... |
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| 2006-01-19 |
Evan Cheng | Two peepholes: |
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| 2006-01-17 |
Evan Cheng | Zero extending load from i1 to i8. |
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| 2006-01-17 |
Evan Cheng | Bug fixes: fpGETRESULT should produces a flag result... |
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| 2006-01-16 |
Evan Cheng | More typo's |
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| 2006-01-16 |
Evan Cheng | Some typo's |
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| 2006-01-16 |
Evan Cheng | Fix FP_TO_INT**_IN_MEM lowering. |
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| 2006-01-15 |
Evan Cheng | Added patterns for 8-bit multiply |
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| 2006-01-14 |
Nate Begeman | bswap implementation |
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| 2006-01-14 |
Evan Cheng | A typo. |
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| 2006-01-13 |
Evan Cheng | Add truncstore i1 patterns. |
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| 2006-01-12 |
Evan Cheng | Fix sint_to_fp (fild*) support. |
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| 2006-01-12 |
Evan Cheng | Specify transformation from GlobalAddress to TargetGlob... |
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