[NVPTX] Fix vector loads from parameters that span multiple loads, and fix some typos
[oota-llvm.git] / lib / Target / NVPTX / NVPTXISelDAGToDAG.cpp
2013-07-01 Justin Holewinski[NVPTX] Fix vector loads from parameters that span...
2013-07-01 Justin Holewinski[NVPTX] Add isel patterns for [reg+offset] form of...
2013-06-28 Justin Holewinski[NVPTX] Clean up comparison/select/convert patterns...
2013-06-28 Justin Holewinski[NVPTX] Remove i8 register class. PTX support for...
2013-06-10 Justin Holewinski[NVPTX] Remove old CONST_NOT_GEN address space that...
2013-05-30 Justin Holewinski[NVPTX] Fix case where a sext load of an i1 type may...
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 2/4.
2013-05-21 Justin Holewinski[NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic
2013-04-19 Michael LiaoArrayRefize getMachineNode(). No functionality change.
2013-03-30 Justin Holewinski[NVPTX] Run clang-format on all NVPTX sources.
2013-02-12 Justin Holewinski[NVPTX] Disable vector registers
2013-01-02 Chandler CarruthMove all of the header files which are involved in...
2012-12-03 Chandler CarruthUse the new script to sort the includes of every file...
2012-05-05 Benjamin KramerNVPTX: Initialize the UseF32FTZ flag.
2012-05-04 Justin HolewinskiThis patch adds a new NVPTX back-end to LLVM which...