Add Neon VCVT instructions for f32 <-> f16 conversions.
[oota-llvm.git] / lib / Target / ARM / ARMInstrInfo.td
2010-12-15 Bob WilsonAdd Neon VCVT instructions for f32 <-> f16 conversions.
2010-12-13 Owen AndersonIn Thumb2, direct branches can be encoded as either...
2010-12-11 Evan Cheng(or (and (shl A, #shamt), mask), B) => ARMbfi B, A...
2010-12-10 Jim GrosbachMore trivial cleanup. No need to define the EncoderMeth...
2010-12-08 Jason W KimARM/MC/ELF TPsoft is now a proper pseudo inst.
2010-12-07 Jim GrosbachRefactor the ARM CMPz* patterns to just use the normal...
2010-12-05 Evan ChengMaking use of VFP / NEON floating point multiply-accumu...
2010-12-02 Jim GrosbachAdd support for binary encoding of ARM 'adr' instructio...
2010-12-01 Jim GrosbachRefactor LEApcrelJT as a pseudo-instructionlowered...
2010-12-01 Jim GrosbachElaborate on FIXME.
2010-11-30 Jim GrosbachAdd FIXME
2010-11-30 Jim GrosbachPseudo-ize ARM MOVPCRX
2010-11-30 Jim GrosbachPseudo-ize BX_CALL and friends. Remove dead instruction...
2010-11-30 Jim GrosbachRename BX/BRIND/etc patterns to clarify which is actual...
2010-11-30 Jim GrosbachMake a few more ARM pseudo instructions actually use...
2010-11-30 Bill WendlingPredicate encoding should be withing {}s. And general...
2010-11-30 Bob WilsonFix the encoding of VLD4-dup alignment.
2010-11-29 Jim GrosbachSimplify definitions of the ARM eh.sjlj.*jmp pseudo...
2010-11-29 Jim GrosbachParameterize ARMPseudoInst size property.
2010-11-29 Evan ChengMark Darwin call instructions as using "r7" to prevent...
2010-11-29 Jim GrosbachPseudo-ize Thumb2 jump tables with explicit MC lowering...
2010-11-29 Jim GrosbachARM Pseudo-ize tBR_JTr.
2010-11-29 Jim GrosbachThe ARM BR_JT* pseudos don't need to use the printer...
2010-11-29 Jim GrosbachSwitch ARM BR_JTm and BR_JTr instructions to be MC...
2010-11-21 Eric ChristopherPseudos default to 4byte size, let the instruction...
2010-11-21 Bill WendlingAdd encoding for ARM "trap" instruction.
2010-11-21 Jim GrosbachBR_JTadd is ARM-only, so use the proper pseudo class...
2010-11-19 Jim GrosbachFix ARM LDR* post-indexed operand encoding.
2010-11-19 Jim GrosbachFix encoding for ARM MLS instruction.
2010-11-19 Jim GrosbachAdd ARM encoding information for STRD.
2010-11-19 Jim GrosbachShuffle things around a bit to keep like things togethe...
2010-11-19 Jim GrosbachFactor out operand encoding bits for ARM addressing...
2010-11-19 Jim GrosbachRefactor PICSTR* instructions to really be pseudos...
2010-11-19 Jim GrosbachRename ARM .td class AIldst1 to AI2ldst for consistency...
2010-11-19 Jim GrosbachAdd ARM binary encoding information for the rest of...
2010-11-19 Jim GrosbachARM LDRD binary encoding.
2010-11-19 Jim GrosbachMinor cleanups to a few llvm_unreachable() calls.
2010-11-18 Jason W KimFix .o emission of ARM movt/movw. MCSymbolRefExpr:...
2010-11-18 Jim GrosbachARM Encoding information for UXTAH and friends.
2010-11-18 Jim GrosbachARM PseudoInst instructions don't need or use an assemb...
2010-11-18 Jim GrosbachRefactor the ARM PICADD and PICLDR* instructions to...
2010-11-18 Jim GrosbachRefactor a few ARM load instructions to better paramete...
2010-11-17 Jim GrosbachClean up LEApcrel instuction(s) a bit. It's not really...
2010-11-17 Jim GrosbachMake the ARM BR_JTadd instruction an explicit pseudo...
2010-11-17 Evan ChengRemove ARM isel hacks that fold large immediates into...
2010-11-17 Jim GrosbachMore ARM encoding bits. LDRH now encodes properly.
2010-11-17 Bill WendlingProper encoding for VLDM and VSTM instructions. The...
2010-11-16 Bill WendlingUse the correct variable names so that the encodings...
2010-11-16 Jim GrosbachARM conditional mov encoding fix.
2010-11-16 Bill Wendling- Remove dead patterns.
2010-11-16 Bill WendlingEncode the multi-load/store instructions with their...
2010-11-15 Jim GrosbachARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B count...
2010-11-15 Jim GrosbachNuke redundant encoding bit set.
2010-11-15 Chris Lattneradd fields to the .td files unconditionally, simplifyin...
2010-11-13 Bill WendlingComment out the defms until they're activated.
2010-11-13 Bill WendlingAdd uses of the *_ldst_multi multiclasses. These aren...
2010-11-13 Bill WendlingConvert the modes to lower case.
2010-11-13 Bill WendlingMinor cleanups:
2010-11-13 Bill WendlingAdd *_ldst_mult multiclasses to the ARM back-end. These...
2010-11-13 Evan ChengConditional moves are slightly more expensive than...
2010-11-13 Evan ChengAdd conditional move of large immediate.
2010-11-13 Jim GrosbachSwap multiclass operand order for consistency with...
2010-11-13 Jim GrosbachContinue ARM indexed load refactoring. Multiclass for...
2010-11-13 Jim GrosbachMore ARM load/store indexed refactoring. Also fix an...
2010-11-12 Evan ChengFor pre-v6t2 targets, only select MOVi32imm if the...
2010-11-12 Evan ChengEliminate ARM::MOVi2pieces. Just use MOVi32imm and...
2010-11-12 Evan ChengAdd conditional mvn instructions.
2010-11-12 Jim GrosbachZap a copy/paste-o bit of dead code.
2010-11-12 Jim GrosbachRefactor to parameterize some ARM load/store encoding...
2010-11-12 Jim GrosbachFill in the default predication bits for ARM unconditio...
2010-11-11 Jim GrosbachARM fixup encoding for direct call instructions (BL).
2010-11-11 Jim GrosbachEncoding of destination fixup for ARM branch and condit...
2010-11-11 Jim GrosbachEncoding for ARM LDRSH_POST.
2010-11-11 Jim GrosbachEncoding for ARM LDRSH and LDRSH_PRE. Cannonicalize...
2010-11-11 Jim GrosbachFix encoding of Ra register for ARM smla* instructions.
2010-11-11 Jim GrosbachARM STRH encoding information.
2010-11-10 Jim GrosbachMove LDM predicate operand encoding into base clase...
2010-11-10 Jim GrosbachARM LDM encoding for the mode (ia, ib, da, db) operand.
2010-11-10 Jim GrosbachFix ARM encoding of non-return LDM instructions.
2010-11-10 Jim GrosbachFix ARM encoding of LDM+Return instruction.
2010-11-09 Jim GrosbachAdd encoding of Rt to ARM LDR/STR w/ reg+reg offset...
2010-11-09 Jim GrosbachAdd encoder method for ARM load/store shifted register...
2010-11-09 Bill WendlingRevert r118457 and r118458. These won't hold for GPRs.
2010-11-08 Bill Wendlingreglist has two operands.
2010-11-08 Bill WendlingMake RegList an ASM operand so that TableGen will gener...
2010-11-04 Evan ChengFix @llvm.prefetch isel. Selecting between pld / pldw...
2010-11-03 Evan ChengFix preload instruction isel. Only v7 supports pli...
2010-11-03 Evan ChengAdd support to match @llvm.prefetch to pld / pldw ...
2010-11-03 Bill WendlingThe MC code couldn't handle ARM LDR instructions with...
2010-11-03 Jim GrosbachBreak ARM addrmode4 (load/store multiple base address...
2010-11-02 Chris LattnerCompletely reject instructions that have an operand...
2010-11-02 Bill WendlingRename getAddrModeImm12OpValue to getAddrModeImmOpValue...
2010-11-02 Owen AndersonRename encoder methods to match naming convention.
2010-11-02 Jim GrosbachSort bit assignments. Cosmetic change only.
2010-11-02 Owen AndersonAdd correct NEON encodings for vld2, vld3, and vld4...
2010-11-02 Owen AndersonAdd correct NEON encodings for the "multiple single...
2010-11-01 Bob WilsonAdd support for alignment operands on VLD1-lane instruc...
2010-11-01 Jim GrosbachMark ARM subtarget features that are available for...
2010-10-31 Chris Lattnerreapply r117858 with apparent editor malfunction fixed...
2010-10-31 Chris Lattnerrevert r117858 while I check out a failure I missed.
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