Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 branches....

but it gets many more of them correct than it did previously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121414 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp
index 606437efbb441392c7f56962dfa236d15649d25f..7311b4181df65186a936723806b31a1d5c2b089b 100644 (file)
--- a/lib/Target/ARM/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/ARMAsmBackend.cpp
@@ -101,6 +101,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
   case ARM::fixup_arm_ldst_pcrel_12:
     // ARM PC-relative values are offset by 8.
     Value -= 4;
+    // FALLTHROUGH
   case ARM::fixup_t2_ldst_pcrel_12: {
     // Offset by 4, adjusted by two due to the half-word ordering of thumb.
     Value -= 4;
@@ -140,7 +141,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
     // Offset by 8 just as above.
     return 0xffffff & ((Value - 8) >> 2);
   case ARM::fixup_t2_branch: {
-    Value = Value - 8;
+    Value = Value - 6;
     Value >>= 1; // Low bit is not encoded.
     
     uint64_t out = 0;

diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp
index 4d8791c9989d6b09aeec1179984fafff92bb3f16..c901831d85814f5b761aa078af3fa2e52454ccb7 100644 (file)
--- a/lib/Target/ARM/ARMMCCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp
@@ -53,7 +53,8 @@ public:
       { "fixup_t2_pcrel_10",        0,    32,   MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_arm_adr_pcrel_12",   1,    24,   MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_arm_branch",         1,    24,   MCFixupKindInfo::FKF_IsPCRel },
-      { "fixup_t2_branch",          0,    32,   MCFixupKindInfo::FKF_IsPCRel },
+      { "fixup_t2_branch",          0,    32,   MCFixupKindInfo::FKF_IsPCRel |
+                                                MCFixupKindInfo::FKF_IsAligned},
       { "fixup_arm_thumb_bl",       0,    32,   MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_arm_thumb_blx",      0,    32,   MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_arm_thumb_cb",       0,    16,   MCFixupKindInfo::FKF_IsPCRel },