Treat longs as ints => pretend they're all 32-bit values and squeeze them into

32-bit registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5008 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 8e049a2c09feac29e21067bddb8c2e3ab1c5cde5..181cc471bb0ec6fe1988578bc938716a8a3a3ea1 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -55,6 +55,8 @@ X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock *MBB,
   case 1: opcode = X86::MOVmr8; break;
   case 2: opcode = X86::MOVmr16; break;
   case 4: opcode = X86::MOVmr32; break;
+    // FIXME: longs handled as ints
+  case 8: opcode = X86::MOVmr32; break;
   default: assert(0 && "Invalid data size!");
   }
 
@@ -74,6 +76,8 @@ X86RegisterInfo::moveReg2Reg(MachineBasicBlock *MBB,
   case 1: opcode = X86::MOVrr8; break;
   case 2: opcode = X86::MOVrr16; break;
   case 4: opcode = X86::MOVrr32; break;
+    // FIXME: longs handled as ints
+  case 8: opcode = X86::MOVrr32; break;
   default: assert(0 && "Invalid data size!");
   }
   
@@ -92,6 +96,8 @@ X86RegisterInfo::moveImm2Reg(MachineBasicBlock *MBB,
   case 1: opcode = X86::MOVir8; break;
   case 2: opcode = X86::MOVir16; break;
   case 4: opcode = X86::MOVir32; break;
+    // FIXME: longs handled as ints
+  case 8: opcode = X86::MOVir32; break;
   default: assert(0 && "Invalid data size!");
   }