unsigned Op2Reg = getRegForValue(I->getOperand(2));
if (Op2Reg == 0) return false;
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8rr))
- .addReg(Op0Reg).addReg(Op0Reg);
+ // Selects operate on i1, however, Op0Reg is 8 bits width and may contain
+ // garbage. Indeed, only the less significant bit is supposed to be accurate.
+ // If we read more than the lsb, we may see non-zero values whereas lsb
+ // is zero. Therefore, we have to truncate Op0Reg to i1 for the select.
+ // This is acheived by performing TEST against 1.
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8ri))
+ .addReg(Op0Reg).addImm(1);
unsigned ResultReg = createResultReg(RC);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg)
.addReg(Op1Reg).addReg(Op2Reg);
--- /dev/null
+; RUN: llc -mtriple x86_64-apple-darwin -O0 -o - < %s | FileCheck %s
+; Make sure we only use the less significant bit of the value that feeds the
+; select. Otherwise, we may account for a non-zero value whereas the
+; lsb is zero.
+; <rdar://problem/15651765>
+
+; CHECK-LABEL: fastisel_select:
+; CHECK: subb {{%[a-z0-9]+}}, [[RES:%[a-z0-9]+]]
+; CHECK: testb $1, [[RES]]
+; CHECK: cmovel
+define i32 @fastisel_select(i1 %exchSub2211_, i1 %trunc_8766) {
+ %shuffleInternal15257_8932 = sub i1 %exchSub2211_, %trunc_8766
+ %counter_diff1345 = select i1 %shuffleInternal15257_8932, i32 1204476887, i32 0
+ ret i32 %counter_diff1345
+}
+