[mips][msa] Direct Object Emission support for the LSA instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193240 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td
index bbb6353864ba883592a2752dec1df60ef19e30b4..875dc0b4034d7310906b82df1e4c2ad1c3d23e4b 100644 (file)
--- a/lib/Target/Mips/MipsMSAInstrFormats.td
+++ b/lib/Target/Mips/MipsMSAInstrFormats.td
@@ -19,6 +19,10 @@ class MSACBranch : MSAInst {
   let Inst{31-26} = 0b010001;
 }
 
+class MSASpecial : MSAInst {
+  let Inst{31-26} = 0b000000;
+}
+
 class PseudoMSA<dag outs, dag ins, list<dag> pattern,
                 InstrItinClass itin = IIPseudo>:
   MipsPseudo<outs, ins, pattern, itin> {
@@ -387,8 +391,16 @@ class MSA_CBRANCH_V_FMT<bits<5> major>: MSACBranch {
   let Inst{15-0} = offset;
 }
 
-class SPECIAL_LSA_FMT: MSAInst {
-  let Inst{25-21} = 0b000000;
+class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial {
+  bits<5> rs;
+  bits<5> rt;
+  bits<5> rd;
+  bits<2> sa;
+
+  let Inst{25-21} = rs;
+  let Inst{20-16} = rt;
+  let Inst{15-11} = rd;
   let Inst{10-8} = 0b000;
-  let Inst{5-0} = 0b000101;
+  let Inst{7-6} = sa;
+  let Inst{5-0} = minor;
 }

diff --git a/lib/Target/Mips/MipsMSAInstrInfo.td b/lib/Target/Mips/MipsMSAInstrInfo.td
index 492e82830af9fc0acf16894326d51e021056df60..25b32836691d0bc271eefdc5a0589cc9c5d87f24 100644 (file)
--- a/lib/Target/Mips/MipsMSAInstrInfo.td
+++ b/lib/Target/Mips/MipsMSAInstrInfo.td
@@ -771,7 +771,7 @@ class LDI_H_ENC  : MSA_I10_FMT<0b010, 0b01, 0b001100>;
 class LDI_W_ENC  : MSA_I10_FMT<0b010, 0b10, 0b001100>;
 class LDI_D_ENC  : MSA_I10_FMT<0b010, 0b11, 0b001100>;
 
-class LSA_ENC : SPECIAL_LSA_FMT;
+class LSA_ENC : SPECIAL_LSA_FMT<0b000101>;
 
 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
@@ -2071,11 +2071,12 @@ class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128WOpnd>;
 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128DOpnd>;
 
 class LSA_DESC {
-  dag OutOperandList = (outs GPR32:$rd);
-  dag InOperandList = (ins GPR32:$rs, GPR32:$rt, uimm2:$sa);
+  dag OutOperandList = (outs GPR32Opnd:$rd);
+  dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, uimm2:$sa);
   string AsmString = "lsa\t$rd, $rs, $rt, $sa";
-  list<dag> Pattern = [(set GPR32:$rd, (add GPR32:$rs, (shl GPR32:$rt,
-                                                            immZExt2Lsa:$sa)))];
+  list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs,
+                                                (shl GPR32Opnd:$rt,
+                                                     immZExt2Lsa:$sa)))];
   InstrItinClass Itinerary = NoItinerary;
 }
 

diff --git a/test/MC/Mips/msa/test_lsa.s b/test/MC/Mips/msa/test_lsa.s
new file mode 100644 (file)
index 0000000..6798ed3
--- /dev/null
+++ b/test/MC/Mips/msa/test_lsa.s
@@ -0,0 +1,9 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+#
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+#
+# CHECK:        lsa        $8, $9, $10, 2              # encoding: [0x01,0x2a,0x40,0x85]
+
+# CHECKOBJDUMP: lsa        $8, $9, $10, 2
+
+                lsa        $8, $9, $10, 2