Make LiveVariables even more optional, by making it optional in the call to TargetIns...

Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53058 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 5c5f0e151c1b8f85cc934689ff95c9c6d6e4a11d..30a184f3b1b007c1611b40ee5b125b7987bd0c2e 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -143,7 +143,7 @@ public:
   ///
   virtual MachineInstr *
   convertToThreeAddress(MachineFunction::iterator &MFI,
-                   MachineBasicBlock::iterator &MBBI, LiveVariables &LV) const {
+                   MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const {
     return 0;
   }
 

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index f6e2f55b3060c609247c0b89bf43c1649056691e..d2e5288d34b6cfb5f8b2ea28f04d1d47861445fe 100644 (file)
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -378,27 +378,6 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
                     if (LV) {
                       // Update live variables
                       LV->instructionChanged(mi, NewMI); 
-                    } else {
-                      // Update flags manually
-                      for (unsigned i = 0, e = mi->getNumOperands();
-                           i != e; ++i) {
-                        MachineOperand &MO = mi->getOperand(i);
-                        if (MO.isRegister() && MO.getReg() &&
-                          TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
-                          unsigned Reg = MO.getReg();
-                          if (MO.isDef()) {
-                            if (MO.isDead()) {
-                              MO.setIsDead(false);
-                              NewMI->addRegisterDead(Reg, TRI);
-                            }
-                          }
-                          
-                          if (MO.isKill()) {
-                            MO.setIsKill(false);
-                            NewMI->addRegisterKilled(Reg, TRI);
-                          }
-                        }
-                      }
                     }
                     
                     mbbi->insert(mi, NewMI);           // Insert the new inst
@@ -424,7 +403,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
                 assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1);
 #endif
 
-              MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, *LV);
+              MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV);
               if (NewMI) {
                 DOUT << "2addr: CONVERTING 2-ADDR: " << *mi;
                 DOUT << "2addr:         TO 3-ADDR: " << *NewMI;
@@ -481,30 +460,6 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
 
             if (LV->removeVirtualRegisterDead(regB, mbbi, mi))
               LV->addVirtualRegisterDead(regB, prevMi);
-          } else {
-            // Manually update kill/dead flags.
-            bool RemovedKill = false;
-            bool RemovedDead = false;
-            for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) {
-              MachineOperand &MO = mi->getOperand(i);
-              if (MO.isRegister() && MO.isKill() && MO.getReg() == regB) {
-                MO.setIsKill(false);
-                RemovedKill = true;
-                break;
-              } 
-              
-              if (MO.isRegister() && MO.isDef() && MO.getReg() == regB) {
-                MO.setIsDead(false);
-                RemovedDead = true;
-              }
-              
-              if (RemovedKill && RemovedDead) break;
-            }
-            
-            if (RemovedKill)
-              prevMi->addRegisterKilled(regB, TRI);
-            if (RemovedDead)
-              prevMi->addRegisterDead(regB, TRI);
           }
           
           // Replace all occurences of regB with regA.

diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index f9f10bafe3e171950847c2c3720ffd9e4107cc39..61e4f26a16a26e4b531be05e79ff8c284e0ab265 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -191,7 +191,7 @@ static unsigned getUnindexedOpcode(unsigned Opc) {
 MachineInstr *
 ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
                                     MachineBasicBlock::iterator &MBBI,
-                                    LiveVariables &LV) const {
+                                    LiveVariables *LV) const {
   if (!EnableARM3Addr)
     return NULL;
 
@@ -300,22 +300,25 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
     if (MO.isRegister() && MO.getReg() &&
         TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
       unsigned Reg = MO.getReg();
-      LiveVariables::VarInfo &VI = LV.getVarInfo(Reg);
-      if (MO.isDef()) {
-        MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI;
-        if (MO.isDead())
-          LV.addVirtualRegisterDead(Reg, NewMI);
-      }
-      if (MO.isUse() && MO.isKill()) {
-        for (unsigned j = 0; j < 2; ++j) {
-          // Look at the two new MI's in reverse order.
-          MachineInstr *NewMI = NewMIs[j];
-          if (!NewMI->readsRegister(Reg))
-            continue;
-          LV.addVirtualRegisterKilled(Reg, NewMI);
-          if (VI.removeKill(MI))
-            VI.Kills.push_back(NewMI);
-          break;
+      
+      if (LV) {
+        LiveVariables::VarInfo &VI = LV->getVarInfo(Reg);
+        if (MO.isDef()) {
+          MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI;
+          if (MO.isDead())
+            LV->addVirtualRegisterDead(Reg, NewMI);
+        }
+        if (MO.isUse() && MO.isKill()) {
+          for (unsigned j = 0; j < 2; ++j) {
+            // Look at the two new MI's in reverse order.
+            MachineInstr *NewMI = NewMIs[j];
+            if (!NewMI->readsRegister(Reg))
+              continue;
+            LV->addVirtualRegisterKilled(Reg, NewMI);
+            if (VI.removeKill(MI))
+              VI.Kills.push_back(NewMI);
+            break;
+          }
         }
       }
     }

diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h
index be95d56a69ac0f5671e7d535e1f411c5460142f1..34c547028aaf5d5e0855efbe794f2030d28b76cb 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.h
+++ b/lib/Target/ARM/ARMInstrInfo.h
@@ -153,7 +153,7 @@ public:
 
   virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
                                               MachineBasicBlock::iterator &MBBI,
-                                              LiveVariables &LV) const;
+                                              LiveVariables *LV) const;
 
   // Branch analysis.
   virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 218487e94bfa956d5c68873e772aab1b2fcf44fe..969a05c580a051f105730595c94fd38fdd2db2e7 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -978,7 +978,7 @@ static bool hasLiveCondCodeDef(MachineInstr *MI) {
 MachineInstr *
 X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
                                     MachineBasicBlock::iterator &MBBI,
-                                    LiveVariables &LV) const {
+                                    LiveVariables *LV) const {
   MachineInstr *MI = MBBI;
   // All instructions input are two-addr instructions.  Get the known operands.
   unsigned Dest = MI->getOperand(0).getReg();
@@ -1066,10 +1066,12 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
       
       MFI->insert(MBBI, Undef);
       MFI->insert(MBBI, Ins);            // Insert the insert_subreg
-      LV.instructionChanged(MI, NewMI);  // Update live variables
-      LV.addVirtualRegisterKilled(leaInReg, NewMI);
+      if (LV) {
+        LV->instructionChanged(MI, NewMI);  // Update live variables
+        LV->addVirtualRegisterKilled(leaInReg, NewMI);
+      }
       MFI->insert(MBBI, NewMI);          // Insert the new inst
-      LV.addVirtualRegisterKilled(leaOutReg, Ext);
+      if (LV) LV->addVirtualRegisterKilled(leaOutReg, Ext);
       MFI->insert(MBBI, Ext);            // Insert the extract_subreg      
       return Ext;
     } else {
@@ -1180,7 +1182,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
   if (!NewMI) return 0;
 
   NewMI->copyKillDeadInfo(MI);
-  LV.instructionChanged(MI, NewMI);  // Update live variables
+  if (LV) LV->instructionChanged(MI, NewMI);  // Update live variables
   MFI->insert(MBBI, NewMI);          // Insert the new inst    
   return NewMI;
 }

diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h
index d24156531e49be409c7e9215b1d65a8ca9ad729e..b38b618cb5f61879a5c79df00e4646ab2b4fd345 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.h
+++ b/lib/Target/X86/X86InstrInfo.h
@@ -295,7 +295,7 @@ public:
   ///
   virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
                                               MachineBasicBlock::iterator &MBBI,
-                                              LiveVariables &LV) const;
+                                              LiveVariables *LV) const;
 
   /// commuteInstruction - We have a few instructions that must be hacked on to
   /// commute them.