Update tests to not be as dependent on section numbers.

Many of these predate llvm-readobj. With elf-dump we had to match
a relocation to symbol number and symbol number to symbol name or
section number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235015 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll b/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll
index d3c0fee..cb91890 100644 (file)
--- a/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll
+++ b/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll
@@ -15,11 +15,6 @@
 ; ASM-NEXT:     .type   _MergedGlobals,%object  @ @_MergedGlobals
 
 
-; OBJ:      Sections [
-; OBJ:        Section {
-; OBJ:          Index: 4
-; OBJ-NEXT:     Name: .bss
-
 ; OBJ:      Symbols [
 ; OBJ:        Symbol {
 ; OBJ:          Name: array00

diff --git a/test/CodeGen/PowerPC/mcm-obj-2.ll b/test/CodeGen/PowerPC/mcm-obj-2.ll
index f31d852..36c5856 100644 (file)
--- a/test/CodeGen/PowerPC/mcm-obj-2.ll
+++ b/test/CodeGen/PowerPC/mcm-obj-2.ll
@@ -20,7 +20,7 @@ entry:
 ; accessing function-scoped variable si.
 ;
 ; CHECK: Relocations [
-; CHECK:   Section (2) .rela.text {
+; CHECK:   Section {{.*}} .rela.text {
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]]
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]]

diff --git a/test/CodeGen/PowerPC/mcm-obj.ll b/test/CodeGen/PowerPC/mcm-obj.ll
index 770ef35..46295cf 100644 (file)
--- a/test/CodeGen/PowerPC/mcm-obj.ll
+++ b/test/CodeGen/PowerPC/mcm-obj.ll
@@ -22,12 +22,12 @@ entry:
 ; accessing external variable ei.
 ;
 ; MEDIUM:      Relocations [
-; MEDIUM:        Section (2) .rela.text {
+; MEDIUM:        Section {{.*}} .rela.text {
 ; MEDIUM-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]]
 ; MEDIUM-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
 ;
 ; LARGE:       Relocations [
-; LARGE:         Section (2) .rela.text {
+; LARGE:         Section {{.*}} .rela.text {
 ; LARGE-NEXT:      0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]]
 ; LARGE-NEXT:      0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
 

diff --git a/test/CodeGen/SPARC/tls.ll b/test/CodeGen/SPARC/tls.ll
index d54cf60..a70637b 100644 (file)
--- a/test/CodeGen/SPARC/tls.ll
+++ b/test/CodeGen/SPARC/tls.ll
@@ -99,7 +99,7 @@ entry:
 ; v9abs-obj: ]
 
 ; pic-obj: Relocations [
-; pic-obj:  Section (2) .rela.text {
+; pic-obj:  Section {{.*}} .rela.text {
 ; pic-obj:    0x{{[0-9,A-F]+}} R_SPARC_PC22 _GLOBAL_OFFSET_TABLE_ 0x4
 ; pic-obj:    0x{{[0-9,A-F]+}} R_SPARC_PC10 _GLOBAL_OFFSET_TABLE_ 0x8
 ; pic-obj:    0x{{[0-9,A-F]+}} R_SPARC_TLS_LDO_HIX22 local_symbol 0x0

diff --git a/test/MC/AArch64/arm64-elf-reloc-condbr.s b/test/MC/AArch64/arm64-elf-reloc-condbr.s
index 9b70a20..3182045 100644 (file)
--- a/test/MC/AArch64/arm64-elf-reloc-condbr.s
+++ b/test/MC/AArch64/arm64-elf-reloc-condbr.s
@@ -4,7 +4,7 @@
         b.eq somewhere
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rela.text {
+// OBJ-NEXT:   Section {{.*}} .rela.text {
 // OBJ-NEXT:     0x0 R_AARCH64_CONDBR19 somewhere 0x0
 // OBJ-NEXT:   }
 // OBJ-NEXT: ]

diff --git a/test/MC/AArch64/elf-extern.s b/test/MC/AArch64/elf-extern.s
index dfa3fb0..14c26c1 100644 (file)
--- a/test/MC/AArch64/elf-extern.s
+++ b/test/MC/AArch64/elf-extern.s
@@ -27,7 +27,7 @@ check_extern:                           // @check_extern
 
 
 // CHECK: Relocations [
-// CHECK:   Section (2) .rela.text {
+// CHECK:   Section {{.*}} .rela.text {
 // CHECK:     0x{{[0-9,A-F]+}} R_AARCH64_CALL26 memcpy
 // CHECK:   }
 // CHECK: ]

diff --git a/test/MC/AArch64/elf-globaladdress.ll b/test/MC/AArch64/elf-globaladdress.ll
index 8e4ae4c..d8a0b5b 100644 (file)
--- a/test/MC/AArch64/elf-globaladdress.ll
+++ b/test/MC/AArch64/elf-globaladdress.ll
@@ -40,7 +40,7 @@ define void @address() {
 ; OBJ: }
 
 ; OBJ: Relocations [
-; OBJ:   Section (2) .rela.text {
+; OBJ:   Section {{.*}} .rela.text {
 ; OBJ:     0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21   var8
 ; OBJ:     0x{{[0-9,A-F]+}} R_AARCH64_LDST8_ABS_LO12_NC  var8
 ; OBJ:     0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21   var16

diff --git a/test/MC/AArch64/elf-reloc-addsubimm.s b/test/MC/AArch64/elf-reloc-addsubimm.s
index e37991b..58e9a6e 100644 (file)
--- a/test/MC/AArch64/elf-reloc-addsubimm.s
+++ b/test/MC/AArch64/elf-reloc-addsubimm.s
@@ -4,7 +4,7 @@
         add x2, x3, #:lo12:some_label
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rela.text {
+// OBJ-NEXT:   Section {{.*}} .rela.text {
 // OBJ-NEXT:     0x0 R_AARCH64_ADD_ABS_LO12_NC some_label 0x0
 // OBJ-NEXT:   }
 // OBJ-NEXT: ]

diff --git a/test/MC/AArch64/elf-reloc-ldrlit.s b/test/MC/AArch64/elf-reloc-ldrlit.s
index d4c3a4e..017d66c 100644 (file)
--- a/test/MC/AArch64/elf-reloc-ldrlit.s
+++ b/test/MC/AArch64/elf-reloc-ldrlit.s
@@ -7,7 +7,7 @@
         prfm pldl3keep, some_label
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rela.text {
+// OBJ-NEXT:   Section {{.*}} .rela.text {
 // OBJ-NEXT:     0x0 R_AARCH64_LD_PREL_LO19 some_label 0x0
 // OBJ-NEXT:     0x4 R_AARCH64_LD_PREL_LO19 some_label 0x0
 // OBJ-NEXT:     0x8 R_AARCH64_LD_PREL_LO19 some_label 0x0

diff --git a/test/MC/AArch64/elf-reloc-ldstunsimm.s b/test/MC/AArch64/elf-reloc-ldstunsimm.s
index 371e7e5..e68937c 100644 (file)
--- a/test/MC/AArch64/elf-reloc-ldstunsimm.s
+++ b/test/MC/AArch64/elf-reloc-ldstunsimm.s
@@ -8,7 +8,7 @@
         str q0, [sp, #:lo12:some_label]
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rela.text {
+// OBJ-NEXT:   Section {{.*}} .rela.text {
 // OBJ-NEXT:     0x0  R_AARCH64_LDST8_ABS_LO12_NC   some_label 0x0
 // OBJ-NEXT:     0x4  R_AARCH64_LDST16_ABS_LO12_NC  some_label 0x0
 // OBJ-NEXT:     0x8  R_AARCH64_LDST32_ABS_LO12_NC  some_label 0x0

diff --git a/test/MC/AArch64/elf-reloc-movw.s b/test/MC/AArch64/elf-reloc-movw.s
index 3331595..fda160f 100644 (file)
--- a/test/MC/AArch64/elf-reloc-movw.s
+++ b/test/MC/AArch64/elf-reloc-movw.s
@@ -23,7 +23,7 @@
         movn x19, #:abs_g2_s:some_label
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rela.text {
+// OBJ-NEXT:   Section {{.*}} .rela.text {
 // OBJ-NEXT:     0x0  R_AARCH64_MOVW_UABS_G0    some_label 0x0
 // OBJ-NEXT:     0x4  R_AARCH64_MOVW_UABS_G0_NC some_label 0x0
 // OBJ-NEXT:     0x8  R_AARCH64_MOVW_UABS_G1    some_label 0x0

diff --git a/test/MC/AArch64/elf-reloc-pcreladdressing.s b/test/MC/AArch64/elf-reloc-pcreladdressing.s
index 093891d..30acb6d 100644 (file)
--- a/test/MC/AArch64/elf-reloc-pcreladdressing.s
+++ b/test/MC/AArch64/elf-reloc-pcreladdressing.s
@@ -8,7 +8,7 @@
         ldr x0, [x5, #:got_lo12:some_label]
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rela.text {
+// OBJ-NEXT:   Section {{.*}} .rela.text {
 // OBJ-NEXT:     0x0 R_AARCH64_ADR_PREL_LO21    some_label 0x0
 // OBJ-NEXT:     0x4 R_AARCH64_ADR_PREL_PG_HI21 some_label 0x0
 // OBJ-NEXT:     0x8 R_AARCH64_ADR_GOT_PAGE     some_label 0x0

diff --git a/test/MC/AArch64/elf-reloc-tstb.s b/test/MC/AArch64/elf-reloc-tstb.s
index 25c9816..e6828e6 100644 (file)
--- a/test/MC/AArch64/elf-reloc-tstb.s
+++ b/test/MC/AArch64/elf-reloc-tstb.s
@@ -5,7 +5,7 @@
         tbnz w3, #15, somewhere
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rela.text {
+// OBJ-NEXT:   Section {{.*}} .rela.text {
 // OBJ-NEXT:     0x0  R_AARCH64_TSTBR14 somewhere 0x0
 // OBJ-NEXT:     0x4  R_AARCH64_TSTBR14 somewhere 0x0
 // OBJ-NEXT:   }

diff --git a/test/MC/AArch64/elf-reloc-uncondbrimm.s b/test/MC/AArch64/elf-reloc-uncondbrimm.s
index 9ac66bd..ff852be 100644 (file)
--- a/test/MC/AArch64/elf-reloc-uncondbrimm.s
+++ b/test/MC/AArch64/elf-reloc-uncondbrimm.s
@@ -5,7 +5,7 @@
         bl somewhere
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rela.text {
+// OBJ-NEXT:   Section {{.*}} .rela.text {
 // OBJ-NEXT:     0x0 R_AARCH64_JUMP26 somewhere 0x0
 // OBJ-NEXT:     0x4 R_AARCH64_CALL26 somewhere 0x0
 // OBJ-NEXT:   }

diff --git a/test/MC/AArch64/tls-relocs.s b/test/MC/AArch64/tls-relocs.s
index 9e94a52..bac4f20 100644 (file)
--- a/test/MC/AArch64/tls-relocs.s
+++ b/test/MC/AArch64/tls-relocs.s
@@ -18,7 +18,7 @@
 // CHECK:                                 //   fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_aarch64_movw
 
 // CHECK-ELF:      Relocations [
-// CHECK-ELF-NEXT:   Section (2) .rela.text {
+// CHECK-ELF-NEXT:   Section {{.*}} .rela.text {
 // CHECK-ELF-NEXT:     0x0 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM:[^ ]+]]
 // CHECK-ELF-NEXT:     0x4 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]]
 // CHECK-ELF-NEXT:     0x8 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]]

diff --git a/test/MC/ARM/2010-11-30-reloc-movt.s b/test/MC/ARM/2010-11-30-reloc-movt.s
index 9de88f0..dc6960b 100644 (file)
--- a/test/MC/ARM/2010-11-30-reloc-movt.s
+++ b/test/MC/ARM/2010-11-30-reloc-movt.s
@@ -34,6 +34,7 @@ barf:                                   @ @barf
 // CHECK-NEXT:       0000: 00482DE9 000000E3 000040E3 FEFFFFEB
 // CHECK-NEXT:       0010: 0088BDE8
 // CHECK-NEXT:     )
+// CHECK:          Name: .rel.text
 // CHECK:          Relocations [
 // CHECK-NEXT:       0x4 R_ARM_MOVW_ABS_NC a
 // CHECK-NEXT:       0x8 R_ARM_MOVT_ABS

diff --git a/test/MC/ARM/arm-elf-symver.s b/test/MC/ARM/arm-elf-symver.s
index 5fb1f6a..26d7655 100644 (file)
--- a/test/MC/ARM/arm-elf-symver.s
+++ b/test/MC/ARM/arm-elf-symver.s
@@ -23,7 +23,7 @@ defined3:
 global1:
 
 @ CHECK: Relocations [
-@ CHECK-NEXT:   Section (2) .rel.text {
+@ CHECK-NEXT:   Section {{.*}} .rel.text {
 @ CHECK-NEXT:     0x0 R_ARM_ABS32 .text 0x0
 @ CHECK-NEXT:     0x4 R_ARM_ABS32 bar2@zed 0x0
 @ CHECK-NEXT:     0x8 R_ARM_ABS32 .text 0x0
@@ -93,7 +93,7 @@ global1:
 @ CHECK-NEXT:     Binding: Local (0x0)
 @ CHECK-NEXT:     Type: Section (0x3)
 @ CHECK-NEXT:     Other: 0
-@ CHECK-NEXT:     Section: .data (0x3)
+@ CHECK-NEXT:     Section: .data
 @ CHECK-NEXT:   }
 @ CHECK-NEXT:   Symbol {
 @ CHECK-NEXT:     Name: .bss (0)
@@ -102,7 +102,7 @@ global1:
 @ CHECK-NEXT:     Binding: Local (0x0)
 @ CHECK-NEXT:     Type: Section (0x3)
 @ CHECK-NEXT:     Other: 0
-@ CHECK-NEXT:     Section: .bss (0x4)
+@ CHECK-NEXT:     Section: .bss
 @ CHECK-NEXT:   }
 @ CHECK-NEXT:   Symbol {
 @ CHECK-NEXT:     Name: g1@@zed

diff --git a/test/MC/ARM/elf-movt.s b/test/MC/ARM/elf-movt.s
index 7f7590f..1ff5da5 100644 (file)
--- a/test/MC/ARM/elf-movt.s
+++ b/test/MC/ARM/elf-movt.s
@@ -35,9 +35,9 @@ barf:                                   @ @barf
 @ OBJ-NEXT:       0000: F00F0FE3 F40F4FE3
 @ OBJ-NEXT:     )
 @ OBJ-NEXT:   }
-@ OBJ-NEXT:   Section {
-@ OBJ-NEXT:     Index: 2
-@ OBJ-NEXT:     Name: .rel.text (1)
+@ OBJ:        Section {
+@ OBJ:          Index:
+@ OBJ:          Name: .rel.text
 @ OBJ-NEXT:     Type: SHT_REL (0x9)
 @ OBJ-NEXT:     Flags [ (0x0)
 @ OBJ-NEXT:     ]

diff --git a/test/MC/ARM/elf-reloc-01.ll b/test/MC/ARM/elf-reloc-01.ll
index 28be85b..7f3cc18 100644 (file)
--- a/test/MC/ARM/elf-reloc-01.ll
+++ b/test/MC/ARM/elf-reloc-01.ll
@@ -61,7 +61,7 @@ bb3:                                              ; preds = %bb, %entry
 declare void @exit(i32) noreturn nounwind
 
 ; OBJ: Relocations [
-; OBJ:   Section (2) .rel.text {
+; OBJ:   Section {{.*}} .rel.text {
 ; OBJ:     0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC _MergedGlobals
 ; OBJ:   }
 ; OBJ: ]

diff --git a/test/MC/ARM/elf-reloc-02.ll b/test/MC/ARM/elf-reloc-02.ll
index 8b4feba..785ead3 100644 (file)
--- a/test/MC/ARM/elf-reloc-02.ll
+++ b/test/MC/ARM/elf-reloc-02.ll
@@ -42,7 +42,7 @@ declare i32 @write(...)
 declare void @exit(i32) noreturn nounwind
 
 ;; OBJ:      Relocations [
-;; OBJ:        Section (2) .rel.text {
+;; OBJ:        Section {{.*}} .rel.text {
 ;; OBJ-NEXT:     0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC .L.str
 ;; OBJ:        }
 ;; OBJ:      ]

diff --git a/test/MC/ARM/elf-reloc-03.ll b/test/MC/ARM/elf-reloc-03.ll
index a0fdc3e..0f2d530 100644 (file)
--- a/test/MC/ARM/elf-reloc-03.ll
+++ b/test/MC/ARM/elf-reloc-03.ll
@@ -89,7 +89,7 @@ entry:
 declare void @exit(i32) noreturn nounwind
 
 ;; OBJ: Relocations [
-;; OBJ:   Section (2) .rel.text {
+;; OBJ:   Section {{.*}} .rel.text {
 ;; OBJ:     0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC vtable
 ;; OBJ:   }
 ;; OBJ: ]

diff --git a/test/MC/ARM/elf-reloc-condcall.s b/test/MC/ARM/elf-reloc-condcall.s
index a0402bd..c4818b8 100644 (file)
--- a/test/MC/ARM/elf-reloc-condcall.s
+++ b/test/MC/ARM/elf-reloc-condcall.s
@@ -8,7 +8,7 @@
         b some_label
 
 // OBJ:      Relocations [
-// OBJ-NEXT:   Section (2) .rel.text {
+// OBJ-NEXT:   Section {{.*}} .rel.text {
 // OBJ-NEXT:     0x0  R_ARM_JUMP24 some_label 0x0
 // OBJ-NEXT:     0x4  R_ARM_CALL   some_label 0x0
 // OBJ-NEXT:     0x8  R_ARM_CALL   some_label 0x0

diff --git a/test/MC/ARM/elf-thumbfunc-reloc.ll b/test/MC/ARM/elf-thumbfunc-reloc.ll
index f502739..f35971a 100644 (file)
--- a/test/MC/ARM/elf-thumbfunc-reloc.ll
+++ b/test/MC/ARM/elf-thumbfunc-reloc.ll
@@ -29,10 +29,10 @@ entry:
 ; CHECK: ]
 
 ; CHECK:      Relocations [
-; CHECK-NEXT:   Section (2) .rel.text {
+; CHECK-NEXT:   Section {{.*}} .rel.text {
 ; CHECK-NEXT:     0x8 R_ARM_THM_CALL foo 0x0
 ; CHECK-NEXT:   }
-; CHECK-NEXT:   Section (7) .rel.ARM.exidx {
+; CHECK-NEXT:   Section {{.*}} .rel.ARM.exidx {
 ; CHECK-NEXT:     0x0 R_ARM_PREL31 .text 0x0
 ; CHECK-NEXT:     0x8 R_ARM_PREL31 .text 0x0
 ; CHECK-NEXT:   }

diff --git a/test/MC/ARM/elf-thumbfunc-reloc.s b/test/MC/ARM/elf-thumbfunc-reloc.s
index ea7d507..dd380c3 100644 (file)
--- a/test/MC/ARM/elf-thumbfunc-reloc.s
+++ b/test/MC/ARM/elf-thumbfunc-reloc.s
@@ -22,7 +22,7 @@ ptr:
 
 @@ make sure an R_ARM_THM_CALL relocation is generated for the call to g
 @CHECK:      Relocations [
-@CHECK-NEXT:   Section (2) .rel.text {
+@CHECK-NEXT:   Section {{.*}} .rel.text {
 @CHECK-NEXT:     0x4 R_ARM_THM_CALL g 0x0
 @CHECK-NEXT:   }
 

diff --git a/test/MC/ELF/basic-elf-32.s b/test/MC/ELF/basic-elf-32.s
index e12fc52..16266af 100644 (file)
--- a/test/MC/ELF/basic-elf-32.s
+++ b/test/MC/ELF/basic-elf-32.s
@@ -45,7 +45,7 @@ main:                                   # @main
 // CHECK:     Name: .rel.text
 
 // CHECK: Relocations [
-// CHECK:   Section (2) .rel.text {
+// CHECK:   Section {{.*}} .rel.text {
 // CHECK:     0x6  R_386_32   .L.str1
 // CHECK:     0xB  R_386_PC32 puts
 // CHECK:     0x12 R_386_32   .L.str2

diff --git a/test/MC/ELF/basic-elf-64.s b/test/MC/ELF/basic-elf-64.s
index a77f3e6..d99125e 100644 (file)
--- a/test/MC/ELF/basic-elf-64.s
+++ b/test/MC/ELF/basic-elf-64.s
@@ -45,7 +45,7 @@ main:                                   # @main
 // CHECK:     Name: .rela.text
 
 // CHECK: Relocations [
-// CHECK:   Section (2) .rela.text {
+// CHECK:   Section {{.*}} .rela.text {
 // CHECK:     0x5  R_X86_64_32   .rodata.str1.1 0x0
 // CHECK:     0xA  R_X86_64_PC32 puts           0xFFFFFFFFFFFFFFFC
 // CHECK:     0xF  R_X86_64_32   .rodata.str1.1 0x6

diff --git a/test/MC/ELF/common.s b/test/MC/ELF/common.s
index bd96564..b7e6ba0 100644 (file)
--- a/test/MC/ELF/common.s
+++ b/test/MC/ELF/common.s
@@ -45,7 +45,7 @@
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: .bss (0x4)
+// CHECK-NEXT:     Section: .bss
 // CHECK-NEXT:   }
 
 

diff --git a/test/MC/ELF/compression.s b/test/MC/ELF/compression.s
index 07b689e..5560ba7 100644 (file)
--- a/test/MC/ELF/compression.s
+++ b/test/MC/ELF/compression.s
@@ -10,7 +10,6 @@
 // Check for the 'ZLIB' file magic at the start of the section only
 // CHECK-NEXT: ZLIB
 // CHECK-NOT: ZLIB
-// CHECK: Contents of
 
 // Don't compress small sections, such as this simple debug_abbrev example
 // CHECK: Contents of section .debug_abbrev:

diff --git a/test/MC/ELF/ifunc-reloc.s b/test/MC/ELF/ifunc-reloc.s
index 0195463..6f1d79b 100644 (file)
--- a/test/MC/ELF/ifunc-reloc.s
+++ b/test/MC/ELF/ifunc-reloc.s
@@ -10,7 +10,7 @@ alias:
         callq sym
 
 // CHECK: Relocations [
-// CHECK-NEXT:   Section (2) .rela.text {
+// CHECK-NEXT:   Section {{.*}} .rela.text {
 // CHECK-NEXT:     0x1 R_X86_64_PC32 sym 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]

diff --git a/test/MC/ELF/local-reloc.s b/test/MC/ELF/local-reloc.s
index 19b9509..ce0b674 100644 (file)
--- a/test/MC/ELF/local-reloc.s
+++ b/test/MC/ELF/local-reloc.s
@@ -7,7 +7,7 @@
 foo:
 
 // CHECK:      Relocations [
-// CHECK:        Section (2) .rela.text {
+// CHECK:        Section {{.*}} .rela.text {
 // CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_32S .text 0x{{[^ ]+}}
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]

diff --git a/test/MC/ELF/merge.s b/test/MC/ELF/merge.s
index d6e0b7c..e787728 100644 (file)
--- a/test/MC/ELF/merge.s
+++ b/test/MC/ELF/merge.s
@@ -21,7 +21,7 @@ zed:
 foo:
 
 // CHECK:      Relocations [
-// CHECK-NEXT:   Section (2) .rela.text {
+// CHECK-NEXT:   Section {{.*}} .rela.text {
 // CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_PC32    .Lfoo 0x{{[^ ]+}}
 // CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_32      .sec1 0x{{[^ ]+}}
 // CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_32      .Lfoo 0x{{[^ ]+}}

diff --git a/test/MC/ELF/relocation-386.s b/test/MC/ELF/relocation-386.s
index b998ea5..2af6add 100644 (file)
--- a/test/MC/ELF/relocation-386.s
+++ b/test/MC/ELF/relocation-386.s
@@ -4,7 +4,7 @@
 // correctly point to the section or the symbol.
 
 // CHECK:      Relocations [
-// CHECK-NEXT:   Section (2) .rel.text {
+// CHECK-NEXT:   Section {{.*}} .rel.text {
 // CHECK-NEXT:     0x2          R_386_GOTOFF     .Lfoo 0x0
 // CHECK-NEXT:     0x{{[^ ]+}}  R_386_PLT32      bar2 0x0
 // CHECK-NEXT:     0x{{[^ ]+}}  R_386_GOTPC      _GLOBAL_OFFSET_TABLE_ 0x0
@@ -79,7 +79,7 @@
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: zedsec (0x5)
+// CHECK-NEXT:     Section: zedsec
 // CHECK-NEXT:   }
 // Symbol 7 is section 4
 // CHECK:        Symbol {
@@ -89,7 +89,7 @@
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: Section
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: .bss (0x4)
+// CHECK-NEXT:     Section: .bss
 // CHECK-NEXT:   }
 
         .text

diff --git a/test/MC/ELF/relocation-pc.s b/test/MC/ELF/relocation-pc.s
index dc60c1a..a8783a7 100644 (file)
--- a/test/MC/ELF/relocation-pc.s
+++ b/test/MC/ELF/relocation-pc.s
@@ -13,8 +13,8 @@
 // CHECK-NEXT:   }
 
 // CHECK:        Section {
-// CHECK:          Index: 2
-// CHECK-NEXT:     Name: .rela.text
+// CHECK:          Index:
+// CHECK:          Name: .rela.text
 // CHECK-NEXT:     Type: SHT_RELA
 // CHECK-NEXT:     Flags [
 // CHECK-NEXT:     ]

diff --git a/test/MC/ELF/rename.s b/test/MC/ELF/rename.s
index 7031c01..a7f9638 100644 (file)
--- a/test/MC/ELF/rename.s
+++ b/test/MC/ELF/rename.s
@@ -15,28 +15,9 @@ defined3:
 
         .global defined1
 
-// Section 1 is .text
 // CHECK:        Section {
-// CHECK:          Index: 1
-// CHECK-NEXT:     Name: .text
-// CHECK-NEXT:     Type: SHT_PROGBITS
-// CHECK-NEXT:     Flags [
-// CHECK-NEXT:       SHF_ALLOC
-// CHECK-NEXT:       SHF_EXECINSTR
-// CHECK-NEXT:     ]
-// CHECK-NEXT:     Address: 0x0
-// CHECK-NEXT:     Offset: 0x40
-// CHECK-NEXT:     Size: 4
-// CHECK-NEXT:     Link: 0
-// CHECK-NEXT:     Info: 0
-// CHECK-NEXT:     AddressAlignment: 4
-// CHECK-NEXT:     EntrySize: 0
-// CHECK-NEXT:     Relocations [
-// CHECK-NEXT:     ]
-// CHECK-NEXT:   }
-// CHECK-NEXT:   Section {
-// CHECK-NEXT:     Index: 2
-// CHECK-NEXT:     Name: .rela.text (1)
+// CHECK:          Index:
+// CHECK:          Name: .rela.text
 // CHECK-NEXT:     Type: SHT_RELA (0x4)
 // CHECK-NEXT:     Flags [ (0x0)
 // CHECK-NEXT:     ]
@@ -51,15 +32,3 @@ defined3:
 // CHECK-NEXT:       0x0 R_X86_64_32 .text 0x0
 // CHECK-NEXT:     ]
 // CHECK-NEXT:   }
-
-
-// Symbol 2 is section 1
-// CHECK:        Symbol {
-// CHECK:          Name: .text (0)
-// CHECK-NEXT:     Value: 0x0
-// CHECK-NEXT:     Size: 0
-// CHECK-NEXT:     Binding: Local
-// CHECK-NEXT:     Type: Section
-// CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: .text (0x1)
-// CHECK-NEXT:   }

diff --git a/test/MC/ELF/section-sym2.s b/test/MC/ELF/section-sym2.s
index acdb7d9..f62e3f9 100644 (file)
--- a/test/MC/ELF/section-sym2.s
+++ b/test/MC/ELF/section-sym2.s
@@ -6,7 +6,7 @@ mov .rodata, %rsi
 .section .rodata
 
 // CHECK:Relocations [
-// CHECK:  Section (2) .rela.text {
+// CHECK:  Section {{.*}} .rela.text {
 // CHECK:    Relocation {
 // CHECK:      Offset: 0x4
 // CHECK:      Type: R_X86_64_32S (11)

diff --git a/test/MC/ELF/symver-msvc.s b/test/MC/ELF/symver-msvc.s
index d6730ca..a726ff3 100644 (file)
--- a/test/MC/ELF/symver-msvc.s
+++ b/test/MC/ELF/symver-msvc.s
@@ -11,7 +11,7 @@
 
 
 // CHECK:       Relocations [
-// CHECK-NEXT:    Section (2) .rela.text {
+// CHECK-NEXT:    Section {{.*}} .rela.text {
 // CHECK-NEXT:      0x0 R_X86_64_32 ??_R0?AVexception@std@@@8 0x0
 // CHECK-NEXT:      0x4 R_X86_64_32 @??_R0?AVinvalid_argument@std@@@8 0x0
 // CHECK-NEXT:      0x8 R_X86_64_32 __imp_??_R0?AVlogic_error@std@@@8 0x0

diff --git a/test/MC/ELF/symver.s b/test/MC/ELF/symver.s
index 6e5825f..80d71fd 100644 (file)
--- a/test/MC/ELF/symver.s
+++ b/test/MC/ELF/symver.s
@@ -22,7 +22,7 @@ defined3:
 global1:
 
 // CHECK:      Relocations [
-// CHECK-NEXT:   Section (2) .rela.text {
+// CHECK-NEXT:   Section {{.*}} .rela.text {
 // CHECK-NEXT:     0x0 R_X86_64_32 .text 0x0
 // CHECK-NEXT:     0x4 R_X86_64_32 bar2@zed 0x0
 // CHECK-NEXT:     0x8 R_X86_64_32 .text 0x0

diff --git a/test/MC/ELF/tls.s b/test/MC/ELF/tls.s
index 79865cd..940827b 100644 (file)
--- a/test/MC/ELF/tls.s
+++ b/test/MC/ELF/tls.s
@@ -19,7 +19,7 @@ foobar:
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: .zed (0x5)
+// CHECK-NEXT:     Section: .zed
 // CHECK-NEXT:   }
 
 // CHECK:        Symbol {

diff --git a/test/MC/ELF/weakref.s b/test/MC/ELF/weakref.s
index 2288264..9485e49 100644 (file)
--- a/test/MC/ELF/weakref.s
+++ b/test/MC/ELF/weakref.s
@@ -131,7 +131,7 @@ bar15:
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: Section
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: .data (0x3)
+// CHECK-NEXT:     Section: .data
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: .bss
@@ -140,7 +140,7 @@ bar15:
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: Section
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: .bss (0x4)
+// CHECK-NEXT:     Section: .bss
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar10

diff --git a/test/MC/Mips/elf-tls.s b/test/MC/Mips/elf-tls.s
index d32a699..d50f62c 100644 (file)
--- a/test/MC/Mips/elf-tls.s
+++ b/test/MC/Mips/elf-tls.s
@@ -3,7 +3,7 @@
 // Check that the appropriate relocations were created.
 
 // CHECK: Relocations [
-// CHECK:   Section (2) .rel.text {
+// CHECK:   Section {{.*}} .rel.text {
 // CHECK:     R_MIPS_TLS_LDM
 // CHECK:     R_MIPS_TLS_DTPREL_HI16
 // CHECK:     R_MIPS_TLS_DTPREL_LO16

diff --git a/test/MC/PowerPC/ppc-reloc.s b/test/MC/PowerPC/ppc-reloc.s
index e7dd1e2..999d33e 100644 (file)
--- a/test/MC/PowerPC/ppc-reloc.s
+++ b/test/MC/PowerPC/ppc-reloc.s
@@ -12,7 +12,7 @@ foo:
        .size foo, . - foo
 
 # CHECK:      Relocations [
-# CHECK-NEXT:   Section (2) .rela.text {
+# CHECK-NEXT:   Section {{.*}} .rela.text {
 # CHECK-NEXT:     0x0 R_PPC_PLTREL24 printf 0x0
 # CHECK-NEXT:     0x4 R_PPC_LOCAL24PC _GLOBAL_OFFSET_TABLE_ 0xFFFFFFFC
 # CHECK-NEXT:   }

diff --git a/test/MC/PowerPC/tls-gd-obj.s b/test/MC/PowerPC/tls-gd-obj.s
index 63d47ee..fb4ab8b 100644 (file)
--- a/test/MC/PowerPC/tls-gd-obj.s
+++ b/test/MC/PowerPC/tls-gd-obj.s
@@ -47,7 +47,7 @@ a:
 // for the call to __tls_get_addr.
 //
 // CHECK: Relocations [
-// CHECK:   Section (2) .rela.text {
+// CHECK:   Section {{.*}} .rela.text {
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_HA a
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_LO a
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TLSGD          a

diff --git a/test/MC/PowerPC/tls-ie-obj.s b/test/MC/PowerPC/tls-ie-obj.s
index c8c5d91..f7de644 100644 (file)
--- a/test/MC/PowerPC/tls-ie-obj.s
+++ b/test/MC/PowerPC/tls-ie-obj.s
@@ -36,7 +36,7 @@ main:                                   # @main
 // accessing external variable a.
 //
 // CHECK: Relocations [
-// CHECK:   Section (2) .rela.text {
+// CHECK:   Section {{.*}} .rela.text {
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_HA    a
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_LO_DS a
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TLS               a

diff --git a/test/MC/PowerPC/tls-ld-obj.s b/test/MC/PowerPC/tls-ld-obj.s
index b0c4a7a..1fa371d 100644 (file)
--- a/test/MC/PowerPC/tls-ld-obj.s
+++ b/test/MC/PowerPC/tls-ld-obj.s
@@ -50,7 +50,7 @@ a:
 // __tls_get_addr.
 //
 // CHECK: Relocations [
-// CHECK:   Section (2) .rela.text {
+// CHECK:   Section {{.*}} .rela.text {
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_HA a
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_LO a
 // CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TLSLD          a

diff --git a/test/MC/X86/expand-var.s b/test/MC/X86/expand-var.s
index ef62d8a..8d5529a 100644 (file)
--- a/test/MC/X86/expand-var.s
+++ b/test/MC/X86/expand-var.s
@@ -1,6 +1,6 @@
 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux < %s | llvm-readobj -r | FileCheck %s
 
-// CHECK:       Section (2) .rela.text {
+// CHECK:       Section {{.*}} .rela.text {
 // CHECK-NEXT:    0x0 R_X86_64_32 d 0x0
 // CHECK-NEXT:  }
 

diff --git a/test/MC/X86/reloc-undef-global.s b/test/MC/X86/reloc-undef-global.s
index a4854d4..24de904 100644 (file)
--- a/test/MC/X86/reloc-undef-global.s
+++ b/test/MC/X86/reloc-undef-global.s
@@ -7,7 +7,7 @@ bar = foo + 4
        .long bar
 
 // ELF:      Relocations [
-// ELF-NEXT:   Section (2) .rela.text {
+// ELF-NEXT:   Section {{.*}} .rela.text {
 // ELF-NEXT:     0x0 R_X86_64_32 foo 0x4
 // ELF-NEXT:   }
 // ELF-NEXT: ]