return (uint64_t)N->getZExtValue() == (unsigned short)N->getZExtValue();
}], LO16>;
+// Immediate can be loaded with LUi (32-bit int with lower 16-bit cleared).
+def immLUiOpnd : PatLeaf<(imm), [{
+ int64_t Val = N->getSExtValue();
+ return isInt<32>(Val) && !(Val & 0xffff);
+}]>;
+
// shamt field must fit in 5 bits.
def immZExt5 : ImmLeaf<i32, [{return Imm == (Imm & 0x1f);}]>;
(ADDiu ZERO, imm:$in)>;
def : Pat<(i32 immZExt16:$in),
(ORi ZERO, imm:$in)>;
+def : Pat<(i32 immLUiOpnd:$in),
+ (LUi (HI16 imm:$in))>;
// Arbitrary immediates
def : Pat<(i32 imm:$imm),
define double @func0(double %d0, double %d1) nounwind readnone {
entry:
; MIPS32-EL: func0:
-; MIPS32-EL: lui $[[T1:[0-9]+]], 32768
-; MIPS32-EL: ori $[[MSK1:[0-9]+]], $[[T1]], 0
; MIPS32-EL: mfc1 $[[HI0:[0-9]+]], $f15
+; MIPS32-EL: lui $[[MSK1:[0-9]+]], 32768
; MIPS32-EL: and $[[AND1:[0-9]+]], $[[HI0]], $[[MSK1]]
; MIPS32-EL: lui $[[T0:[0-9]+]], 32767
; MIPS32-EL: ori $[[MSK0:[0-9]+]], $[[T0]], 65535
; MIPS32-EL: mtc1 $[[LO0]], $f0
; MIPS32-EL: mtc1 $[[OR]], $f1
;
-; MIPS32-EB: lui $[[T1:[0-9]+]], 32768
-; MIPS32-EB: ori $[[MSK1:[0-9]+]], $[[T1]], 0
; MIPS32-EB: mfc1 $[[HI1:[0-9]+]], $f14
+; MIPS32-EB: lui $[[MSK1:[0-9]+]], 32768
; MIPS32-EB: and $[[AND1:[0-9]+]], $[[HI1]], $[[MSK1]]
; MIPS32-EB: lui $[[T0:[0-9]+]], 32767
; MIPS32-EB: ori $[[MSK0:[0-9]+]], $[[T0]], 65535
define float @func1(float %f0, float %f1) nounwind readnone {
entry:
; MIPS32-EL: func1:
-; MIPS32-EL: lui $[[T1:[0-9]+]], 32768
-; MIPS32-EL: ori $[[MSK1:[0-9]+]], $[[T1]], 0
; MIPS32-EL: mfc1 $[[ARG1:[0-9]+]], $f14
+; MIPS32-EL: lui $[[MSK1:[0-9]+]], 32768
; MIPS32-EL: and $[[T3:[0-9]+]], $[[ARG1]], $[[MSK1]]
; MIPS32-EL: lui $[[T0:[0-9]+]], 32767
; MIPS32-EL: ori $[[MSK0:[0-9]+]], $[[T0]], 65535