add missing cmov aliases, this resolves rdar://8208499

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113189 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 0c7b9e4245d138323ccd8e39c5180c01c9e45c64..e54edf2657669954d2abf7e08e0010d15e441589 100644 (file)
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -662,19 +662,33 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
     .Case("jnle", "jg")
     .Case("jpe", "jp")
     .Case("jpo", "jnp")
-    .Case("cmovcl", "cmovbl")
-    .Case("cmovnal", "cmovbel")
-    .Case("cmovnbl", "cmovael")
-    .Case("cmovnbel", "cmoval")
-    .Case("cmovncl", "cmovael")
-    .Case("cmovngl", "cmovlel")
-    .Case("cmovnl", "cmovgel")
-    .Case("cmovngl", "cmovlel")
-    .Case("cmovngel", "cmovll")
-    .Case("cmovnll", "cmovgel")
-    .Case("cmovnlel", "cmovgl")
-    .Case("cmovnzl", "cmovnel")
-    .Case("cmovzl", "cmovel")
+    // Condition code aliases for 16-bit, 32-bit, 64-bit and unspec operands.
+    .Case("cmovcw",  "cmovbw") .Case("cmovcl",  "cmovbl")
+    .Case("cmovcq",  "cmovbq") .Case("cmovc",   "cmovb")
+    .Case("cmovnaw", "cmovbew").Case("cmovnal", "cmovbel")
+    .Case("cmovnaq", "cmovbeq").Case("cmovna",  "cmovbe")
+    .Case("cmovnbw", "cmovaew").Case("cmovnbl", "cmovael")
+    .Case("cmovnbq", "cmovaeq").Case("cmovnb",  "cmovae")
+    .Case("cmovnbew","cmovaw") .Case("cmovnbel","cmoval")
+    .Case("cmovnbeq","cmovaq") .Case("cmovnbe", "cmova")
+    .Case("cmovncw", "cmovaew").Case("cmovncl", "cmovael")
+    .Case("cmovncq", "cmovaeq").Case("cmovnc",  "cmovae")
+    .Case("cmovngw", "cmovlew").Case("cmovngl", "cmovlel")
+    .Case("cmovngq", "cmovleq").Case("cmovng",  "cmovle")
+    .Case("cmovnw",  "cmovgew").Case("cmovnl",  "cmovgel")
+    .Case("cmovnq",  "cmovgeq").Case("cmovn",   "cmovge")
+    .Case("cmovngw", "cmovlew").Case("cmovngl", "cmovlel")
+    .Case("cmovngq", "cmovleq").Case("cmovng",  "cmovle")
+    .Case("cmovngew","cmovlw") .Case("cmovngel","cmovll")
+    .Case("cmovngeq","cmovlq") .Case("cmovnge", "cmovl")
+    .Case("cmovnlw", "cmovgew").Case("cmovnll", "cmovgel")
+    .Case("cmovnlq", "cmovgeq").Case("cmovnl",  "cmovge")
+    .Case("cmovnlew","cmovgw") .Case("cmovnlel","cmovgl")
+    .Case("cmovnleq","cmovgq") .Case("cmovnle", "cmovg")
+    .Case("cmovnzw", "cmovnew").Case("cmovnzl", "cmovnel")
+    .Case("cmovnzq", "cmovneq").Case("cmovnz",  "cmovne")
+    .Case("cmovzw",  "cmovew") .Case("cmovzl",  "cmovel")
+    .Case("cmovzq",  "cmoveq") .Case("cmovz",   "cmove")
     .Case("fwait", "wait")
     .Case("movzx", "movzb")
     .Default(Name);

diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
index f27f2433d3cf757498a623a7efded09670596ab1..9b535eaa5eae84cb822aaee62d222f1c65fa0845 100644 (file)
--- a/test/MC/AsmParser/X86/x86_instructions.s
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -181,3 +181,10 @@ push $1
 // rdar://8017530
 // CHECK: sldtw        4
 sldt   4
+
+// rdar://8208499
+// CHECK: cmovnew      %bx, %ax
+cmovnz %bx, %ax
+// CHECK: cmovneq      %rbx, %rax
+cmovnzq %rbx, %rax
+