[PowerPC] Add test case for r181891
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 15 May 2013 15:02:12 +0000 (15:02 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 15 May 2013 15:02:12 +0000 (15:02 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181892 91177308-0d34-0410-b5e6-96231b3b80d8

test/MC/PowerPC/ppc64-fixup-apply.s [new file with mode: 0644]

diff --git a/test/MC/PowerPC/ppc64-fixup-apply.s b/test/MC/PowerPC/ppc64-fixup-apply.s
new file mode 100644 (file)
index 0000000..a64052b
--- /dev/null
@@ -0,0 +1,38 @@
+
+# RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
+# RUN: llvm-readobj -s -sd | FileCheck %s
+
+# This checks that fixups that can be resolved within the same
+# object file are applied correctly.
+
+.data
+
+.quad v1
+.word v2
+.short v3
+.byte v4
+
+.set v1, 0x123456789abcdef0
+.set v2, 0x87654321
+.set v3, 0xbeef
+.set v4, 0x42
+
+# CHECK:        Section {
+# CHECK:          Name: .data
+# CHECK-NEXT:     Type: SHT_PROGBITS
+# CHECK-NEXT:     Flags [
+# CHECK-NEXT:       SHF_ALLOC
+# CHECK-NEXT:       SHF_WRITE
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Address: 0x0
+# CHECK-NEXT:     Offset:
+# CHECK-NEXT:     Size: 15
+# CHECK-NEXT:     Link: 0
+# CHECK-NEXT:     Info: 0
+# CHECK-NEXT:     AddressAlignment: 4
+# CHECK-NEXT:     EntrySize: 0
+# CHECK-NEXT:     SectionData (
+# CHECK-NEXT:       0000: 12345678 9ABCDEF0 87654321 BEEF42
+# CHECK-NEXT:     )
+# CHECK-NEXT:   }
+