Fix the register scavenger for targets that provide custom spilling

As pointed out by Richard Sandiford, my recent updates to the register
scavenger broke targets that use custom spilling (because the new code assumed
that if there were no valid spill slots, than spilling would be impossible).

I don't have a test case, but it should be possible to create one for Thumb 1,
Mips 16, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178073 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index 0eb2b2ab07f75b8d5109cea31421eb9b4107301a..49d16892f87afb0862a6895562f138bd03fcf568 100644 (file)
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -42,7 +42,7 @@ class RegScavenger {
 
   /// Information on scavenged registers (held in a spill slot).
   struct ScavengedInfo {
-    ScavengedInfo(int FI) : FrameIndex(FI), Reg(0), Restore(NULL) {}
+    ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(NULL) {}
 
     /// A spill slot used for scavenging a register post register allocation.
     int FrameIndex;
@@ -130,7 +130,8 @@ public:
   void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
     for (SmallVector<ScavengedInfo, 2>::const_iterator I = Scavenged.begin(),
          IE = Scavenged.end(); I != IE; ++I)
-      A.push_back(I->FrameIndex);
+      if (I->FrameIndex >= 0)
+        A.push_back(I->FrameIndex);
   }
 
   /// scavengeRegister - Make a register of the specific register class

diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index 4c85644e1a35367d419402bdcd23e6f9861e9a1f..6b85cd93cf32de02a5e18b2a240cc0ae625d71a0 100644 (file)
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -371,8 +371,11 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
     if (Scavenged[SI].Reg == 0)
       break;
 
-  assert(SI < Scavenged.size() &&
-         "Scavenger slots are live, unable to scavenge another register!");
+  if (SI < Scavenged.size()) {
+    // We need to scavenge a register but have no spill slot, the target
+    // must know how to do it (if not, we'll assert below).
+    Scavenged.push_back(ScavengedInfo());
+  }
 
   // Avoid infinite regress
   Scavenged[SI].Reg = SReg;