Add missing breaks to AArch64InstrInfo::isGPRCopy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214528 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64InstrInfo.cpp b/lib/Target/AArch64/AArch64InstrInfo.cpp
index 946c000cdccc772cb2fe88ef275ff0d04892821b..1273606699c7a76cc2c782fc23dfee4c3c7d5c7b 100644 (file)
--- a/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -1058,12 +1058,14 @@ bool AArch64InstrInfo::isGPRCopy(const MachineInstr *MI) const {
              MI->getOperand(3).getImm() == 0 && "invalid ORRrs operands");
       return true;
     }
              MI->getOperand(3).getImm() == 0 && "invalid ORRrs operands");
       return true;
     }

+    break;

   case AArch64::ADDXri: // add Xd, Xn, #0 (LSL #0)
     if (MI->getOperand(2).getImm() == 0) {
       assert(MI->getDesc().getNumOperands() == 4 &&
              MI->getOperand(3).getImm() == 0 && "invalid ADDXri operands");
       return true;
     }
   case AArch64::ADDXri: // add Xd, Xn, #0 (LSL #0)
     if (MI->getOperand(2).getImm() == 0) {
       assert(MI->getDesc().getNumOperands() == 4 &&
              MI->getOperand(3).getImm() == 0 && "invalid ADDXri operands");
       return true;
     }

+    break;

   }
   return false;
 }
   }
   return false;
 }


@@ -1086,6 +1088,7 @@ bool AArch64InstrInfo::isFPRCopy(const MachineInstr *MI) const {
              "invalid ORRv16i8 operands");
       return true;
     }
              "invalid ORRv16i8 operands");
       return true;
     }

+    break;

   }
   return false;
 }
   }
   return false;
 }