Fix some tablegen issues to allow using zero_reg for InstAlias definitions.

This is needed to allow an InstAlias for an instruction with an "OptionalDef"
result register (like ARM's cc_out) where you want to set the optional register
to reg0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123490 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp
index 511538db9d7a8b170bd8deb9c40a4b1b34f4e9cf..6262cf8cc1689ec2ff82aa0449ca89b35550025e 100644 (file)
--- a/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1380,9 +1380,14 @@ static void EmitConvertToMCInst(CodeGenTarget &Target,
         break;
       }
       case MatchableInfo::ResOperand::RegOperand: {
-        std::string N = getQualifiedName(OpInfo.Register);
-        CaseOS << "    Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
-        Signature += "__reg" + OpInfo.Register->getName();
+        if (OpInfo.Register == 0) {
+          CaseOS << "    Inst.addOperand(MCOperand::CreateReg(0));\n";
+          Signature += "__reg0";
+        } else {
+          std::string N = getQualifiedName(OpInfo.Register);
+          CaseOS << "    Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
+          Signature += "__reg" + OpInfo.Register->getName();
+        }
       }  
       }
     }

diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp
index a28b1d58d7e914a5a5f5cff21359736d7e5f4cf3..08005fb5e1c1e58c1013d0b94991021527688522 100644 (file)
--- a/utils/TableGen/CodeGenInstruction.cpp
+++ b/utils/TableGen/CodeGenInstruction.cpp
@@ -442,6 +442,21 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
         ++AliasOpNo;
         continue;
       }
+      if (ADI->getDef()->getName() == "zero_reg") {
+        if (!Result->getArgName(AliasOpNo).empty())
+          throw TGError(R->getLoc(), "result fixed register argument must "
+                        "not have a name!");
+
+        // Check if this is an optional def.
+        if (!ResultOpRec->isSubClassOf("OptionalDefOperand"))
+          throw TGError(R->getLoc(), "reg0 used for result that is not an "
+                        "OptionalDefOperand!");
+
+        // Now that it is validated, add it.
+        ResultOperands.push_back(ResultOperand(static_cast<Record*>(0)));
+        ++AliasOpNo;
+        continue;
+      }
     }
     
     // If the operand is a record, it must have a name, and the record type must