[SystemZ] Fix RNSBG bug introduced by r197802

The zext handling added in r197802 wasn't right for RNSBG.  This patch
restricts it to ROSBG, RXSBG and RISBG.  (The tests for RISBG were added
in r197802 since RISBG was the motivating example.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198862 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index d95361eed15942d442ac216d8dbb2d253c97e036..aa4752c2babcb8eec84f20dde82f4fd0601f97ac 100644 (file)
--- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -769,15 +769,17 @@ bool SystemZDAGToDAGISel::expandRxSBG(RxSBGOperands &RxSBG) const {
     RxSBG.Input = N.getOperand(0);
     return true;
 
-  case ISD::ZERO_EXTEND: {
-    // Restrict the mask to the extended operand.
-    unsigned InnerBitSize = N.getOperand(0).getValueType().getSizeInBits();
-    if (!refineRxSBGMask(RxSBG, allOnes(InnerBitSize)))
-      return false;
+  case ISD::ZERO_EXTEND:
+    if (RxSBG.Opcode != SystemZ::RNSBG) {
+      // Restrict the mask to the extended operand.
+      unsigned InnerBitSize = N.getOperand(0).getValueType().getSizeInBits();
+      if (!refineRxSBGMask(RxSBG, allOnes(InnerBitSize)))
+        return false;
 
-    RxSBG.Input = N.getOperand(0);
-    return true;
-  }
+      RxSBG.Input = N.getOperand(0);
+      return true;
+    }
+    // Fall through.
     
   case ISD::SIGN_EXTEND: {
     // Check that the extension bits are don't-care (i.e. are masked out

diff --git a/test/CodeGen/SystemZ/rnsbg-01.ll b/test/CodeGen/SystemZ/rnsbg-01.ll
index 666aeb21e8d801422b51f9e0bd1e0cbc7cae1790..282810a781518b21d7a5d992f6aee954cbaa69a8 100644 (file)
--- a/test/CodeGen/SystemZ/rnsbg-01.ll
+++ b/test/CodeGen/SystemZ/rnsbg-01.ll
@@ -255,3 +255,14 @@ define i64 @f22(i64 %a, i64 %b) {
   %and = and i64 %a, %rotlorb
   ret i64 %and
 }
+
+; Check the handling of zext and AND, which isn't suitable for RNSBG.
+define i64 @f23(i64 %a, i32 %b) {
+; CHECK-LABEL: f23:
+; CHECK-NOT: rnsbg
+; CHECK: br %r14
+  %add = add i32 %b, 1
+  %ext = zext i32 %add to i64
+  %and = and i64 %a, %ext
+  ret i64 %and
+}

diff --git a/test/CodeGen/SystemZ/rosbg-01.ll b/test/CodeGen/SystemZ/rosbg-01.ll
index 0abacccba14cedfed5a0ebfe891e1c981da8a917..96ee870d42b43f9ef28ecc6d539ed19fdf4b9bbd 100644 (file)
--- a/test/CodeGen/SystemZ/rosbg-01.ll
+++ b/test/CodeGen/SystemZ/rosbg-01.ll
@@ -108,3 +108,14 @@ define i64 @f11(i64 %a, i64 %b) {
   %or = or i64 %a, %andb
   ret i64 %or
 }
+
+; Check the handling of zext and OR, which can use ROSBG.
+define i64 @f12(i64 %a, i32 %b) {
+; CHECK-LABEL: f12:
+; CHECK: rosbg %r2, %r3, 32, 63, 0
+; CHECK: br %r14
+  %add = add i32 %b, 1
+  %ext = zext i32 %add to i64
+  %or = or i64 %a, %ext
+  ret i64 %or
+}

diff --git a/test/CodeGen/SystemZ/rxsbg-01.ll b/test/CodeGen/SystemZ/rxsbg-01.ll
index 5491bff2ecdc23a630e1f56b3749d4856df2c978..339fe2a289f033e3ab97cad3b29223a94b5b0cda 100644 (file)
--- a/test/CodeGen/SystemZ/rxsbg-01.ll
+++ b/test/CodeGen/SystemZ/rxsbg-01.ll
@@ -110,3 +110,14 @@ define i64 @f11(i64 %a, i64 %b) {
   %xor = xor i64 %a, %andb
   ret i64 %xor
 }
+
+; Check the handling of zext and XOR, which can use ROSBG.
+define i64 @f12(i64 %a, i32 %b) {
+; CHECK-LABEL: f12:
+; CHECK: rxsbg %r2, %r3, 32, 63, 0
+; CHECK: br %r14
+  %add = add i32 %b, 1
+  %ext = zext i32 %add to i64
+  %xor = xor i64 %a, %ext
+  ret i64 %xor
+}