This logic was accidentally inverted in r78767.
authorDan Gohman <gohman@apple.com>
Wed, 12 Aug 2009 01:44:20 +0000 (01:44 +0000)
committerDan Gohman <gohman@apple.com>
Wed, 12 Aug 2009 01:44:20 +0000 (01:44 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78773 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/PostRASchedulerList.cpp

index 27c73a75951aa791448e7d4407626ec4e1057681..f3dfb01ff12f3bd86d759433a3aecc939e87b066 100644 (file)
@@ -532,9 +532,9 @@ SchedulePostRATDList::findSuitableFreeRegister(unsigned AntiDepReg,
            "Kill and Def maps aren't consistent for AntiDepReg!");
     assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u)) &&
            "Kill and Def maps aren't consistent for NewReg!");
-    if (KillIndices[NewReg] == ~0u &&
-        Classes[NewReg] != reinterpret_cast<TargetRegisterClass *>(-1) &&
-        KillIndices[AntiDepReg] <= DefIndices[NewReg])
+    if (KillIndices[NewReg] != ~0u ||
+        Classes[NewReg] == reinterpret_cast<TargetRegisterClass *>(-1) ||
+        KillIndices[AntiDepReg] > DefIndices[NewReg])
       continue;
     return NewReg;
   }