Update bitcode reader and writer to handle multiple return values.

Take 2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47583 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp
index ebfca09c49123894c6ad92433c8d6dda211a354a..487a135509c40ada0322250721d8ce57212a64ec 100644 (file)
--- a/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -1337,17 +1337,24 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
     }
     
     case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval<optional>]
-      if (Record.empty()) {
-        I = new ReturnInst();
-        break;
-      } else {
-        unsigned OpNum = 0;
-        Value *Op;
-        if (getValueTypePair(Record, OpNum, NextValueNo, Op) ||
-            OpNum != Record.size())
-          return Error("Invalid RET record");
-        I = new ReturnInst(Op);
-        break;
+      {
+        unsigned Size = Record.size();
+        if (Size == 0) {
+          I = new ReturnInst();
+          break;
+        } else {
+          unsigned OpNum = 0;
+          std::vector<Value *> Vs;
+          do {
+            Value *Op = NULL;
+            if (getValueTypePair(Record, OpNum, NextValueNo, Op))
+              return Error("Invalid RET record");
+            Vs.push_back(Op);
+          } while(OpNum != Record.size());
+
+          I = new ReturnInst(Vs);
+          break;
+        }
       }
     case bitc::FUNC_CODE_INST_BR: { // BR: [bb#, bb#, opval] or [bb#]
       if (Record.size() != 1 && Record.size() != 3)

diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp
index 9b2b93cfceaa5cc4520e754b5369504ae3b5aec5..6a54514db6d127284d8807245f7e5a833385fff3 100644 (file)
--- a/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -747,15 +747,24 @@ static void WriteInstruction(const Instruction &I, unsigned InstID,
   case Instruction::GetResult:
     Code = bitc::FUNC_CODE_INST_GETRESULT;
     PushValueAndType(I.getOperand(0), InstID, Vals, VE);
-    Vals.push_back(Log2_32(cast<GetResultInst>(I).getIndex())+1);
+    Vals.push_back(cast<GetResultInst>(I).getIndex());
     break;
 
-  case Instruction::Ret:
-    Code = bitc::FUNC_CODE_INST_RET;
-    if (!I.getNumOperands())
-      AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV;
-    else if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE))
-      AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV;
+  case Instruction::Ret: 
+    {
+      Code = bitc::FUNC_CODE_INST_RET;
+      unsigned NumOperands = I.getNumOperands();
+      //      printf ("dpatel write %d\n", NumOperands);
+      if (NumOperands == 0)
+        AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV;
+      else if (NumOperands == 1) {
+        if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE))
+          AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV;
+      } else {
+        for (unsigned i = 0, e = NumOperands; i != e; ++i)
+          PushValueAndType(I.getOperand(i), InstID, Vals, VE);
+      }
+    }
     break;
   case Instruction::Br:
     Code = bitc::FUNC_CODE_INST_BR;

diff --git a/test/Assembler/2008-02-20-MultipleReturnValue.ll b/test/Assembler/2008-02-20-MultipleReturnValue.ll
index f84ceef293bd436fa2c06ec042a8271b3b98ddf1..5b2ed7e8f48069e0641972cf40439279902dd8c2 100644 (file)
--- a/test/Assembler/2008-02-20-MultipleReturnValue.ll
+++ b/test/Assembler/2008-02-20-MultipleReturnValue.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s -disable-output
+; RUN: llvm-as < %s | opt -verify | llvm-dis | llvm-as -disable-output
 
 define {i32, i8} @foo(i32 %p) {
   ret i32 1, i8 2