The sign of an srem instruction is the sign of its dividend (the first

argument), regardless of the divisor. Teach instcombine about this and fix
test7 in PR9343!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126635 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Transforms/InstCombine/InstCombineCompares.cpp b/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 999de3409750bbb2c0392b056e78964567e4948f..7c67bf61b6ccc1a451c30cfac5939c535f753d18 100644 (file)
--- a/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -1340,6 +1340,16 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
       }
     }
     break;
+
+  case Instruction::SRem: {
+    bool TrueIfSigned;
+    if (LHSI->hasOneUse() &&
+        isSignBitCheck(ICI.getPredicate(), RHS, TrueIfSigned)) {
+      // srem has the same sign as its dividend so the divisor is irrelevant.
+      return new ICmpInst(ICI.getPredicate(), LHSI->getOperand(0), RHS);
+    }
+    break;
+  }
   }
   
   // Simplify icmp_eq and icmp_ne instructions with integer constant RHS.
@@ -1855,11 +1865,11 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
       return new ICmpInst(ICmpInst::ICMP_SLT, Op0,
                           ConstantInt::get(CI->getContext(), CI->getValue()+1));
     case ICmpInst::ICMP_UGE:
-      assert(!CI->isMinValue(false));                  // A >=u MIN -> TRUE
+      assert(!CI->isMinValue(false));                 // A >=u MIN -> TRUE
       return new ICmpInst(ICmpInst::ICMP_UGT, Op0,
                           ConstantInt::get(CI->getContext(), CI->getValue()-1));
     case ICmpInst::ICMP_SGE:
-      assert(!CI->isMinValue(true));                   // A >=s MIN -> TRUE
+      assert(!CI->isMinValue(true));                  // A >=s MIN -> TRUE
       return new ICmpInst(ICmpInst::ICMP_SGT, Op0,
                           ConstantInt::get(CI->getContext(), CI->getValue()-1));
     }
@@ -1913,7 +1923,7 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
                           ConstantInt::get(I.getContext(), Op1Min));
 
     // Based on the range information we know about the LHS, see if we can
-    // simplify this comparison.  For example, (x&4) < 8  is always true.
+    // simplify this comparison.  For example, (x&4) < 8 is always true.
     switch (I.getPredicate()) {
     default: llvm_unreachable("Unknown icmp opcode!");
     case ICmpInst::ICMP_EQ: {

diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll
index 3150883e7d7105f5f9e965e9559b19fc2cb0999a..c11dea5b8fa1dafa34f08302845413c60a98a1fe 100644 (file)
--- a/test/Transforms/InstCombine/icmp.ll
+++ b/test/Transforms/InstCombine/icmp.ll
@@ -377,3 +377,13 @@ define i1 @test38(i32 %x, i32 %y, i32 %z) {
   %c = icmp ugt i32 %lhs, %rhs
   ret i1 %c
 }
+
+; PR9343 #7
+; CHECK: @test39
+; CHECK: ret i1 false
+define i1 @test39(i31 %X, i32 %Y) {
+  %A = zext i31 %X to i32
+  %B = srem i32 %A, %Y
+  %C = icmp slt i32 %B, 0
+  ret i1 %C
+}