change selectiondag to add the sign extended versions of immediate operands

to instructions instead of zero extended ones.  This makes the asmprinter
print signed values more consistently.  This apparently only really affects
the X86 backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
index ec82b351d8929e5a3a1959f845fe142f17a4d511..5454e98ae03316dfe11722dec392ee824ab61d7b 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
@@ -282,7 +282,7 @@ void ScheduleDAGSDNodes::AddOperand(MachineInstr *MI, SDValue Op,
   if (Op.isMachineOpcode()) {
     AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap);
   } else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
-    MI->addOperand(MachineOperand::CreateImm(C->getZExtValue()));
+    MI->addOperand(MachineOperand::CreateImm(C->getSExtValue()));
   } else if (ConstantFPSDNode *F = dyn_cast<ConstantFPSDNode>(Op)) {
     const ConstantFP *CFP = F->getConstantFPValue();
     MI->addOperand(MachineOperand::CreateFPImm(CFP));

diff --git a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
index ad91fad061a8af0c7af2a051d3cad7b0160d7b7a..2d76916f85c6e446cdf5b526c76905098ad24045 100644 (file)
--- a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
+++ b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
@@ -41,7 +41,7 @@ using namespace llvm;
 STATISTIC(EmittedInsts, "Number of machine instrs printed");
 
 static cl::opt<bool> NewAsmPrinter("experimental-asm-printer",
-                                   cl::Hidden);
+                                   cl::Hidden, cl::init(false));
 
 //===----------------------------------------------------------------------===//
 // Primitive Helper Functions.

diff --git a/test/CodeGen/X86/2006-11-28-Memcpy.ll b/test/CodeGen/X86/2006-11-28-Memcpy.ll
index a58bedc28d7587f3a72198c6b7213444066594fc..8c1573f130ba11a308af1e33ddfa493452ec81b1 100644 (file)
--- a/test/CodeGen/X86/2006-11-28-Memcpy.ll
+++ b/test/CodeGen/X86/2006-11-28-Memcpy.ll
@@ -1,8 +1,6 @@
 ; PR1022, PR1023
-; RUN: llvm-as < %s | llc -march=x86 | \
-; RUN:   grep 3721182122 | count 2
-; RUN: llvm-as < %s | llc -march=x86 | \
-; RUN:   grep -E {movl _?bytes2} | count 1
+; RUN: llc < %s -march=x86 | grep -- -573785174 | count 2
+; RUN: llc < %s -march=x86 | grep -E {movl     _?bytes2} | count 1
 
 @fmt = constant [4 x i8] c"%x\0A\00"            ; <[4 x i8]*> [#uses=2]
 @bytes = constant [4 x i8] c"\AA\BB\CC\DD"              ; <[4 x i8]*> [#uses=1]

diff --git a/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll b/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
index 835e4caf0aafcb426656abf66bdb8e7645e470ab..423081fb3b637d26d2a4be3ee48b64433258dd7d 100644 (file)
--- a/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
+++ b/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep 170
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep -- -86
 
 define i16 @f(<4 x float>* %tmp116117.i1061.i) nounwind {
 entry:

diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll
index fe1870e1d84c5c21c56cb6af912bca60ffec177c..a43bfb894ccd8801e3f6433219d537b10cd06918 100644 (file)
--- a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll
+++ b/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll
@@ -1,5 +1,4 @@
-; RUN:  llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep 63551 | count 1
-; ModuleID = '<stdin>'
+; RUN:  llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep -- -1985 | count 1
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
 target triple = "i686-pc-linux-gnu"
 

diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll
index faf7cd4b22040a97903ffce4bae57dbca0e394e4..7c811afa51d3ef1be9778dceb5d071050d1b3016 100644 (file)
--- a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll
+++ b/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll
@@ -1,5 +1,4 @@
-; RUN:  llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep 63551
-; ModuleID = '<stdin>'
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
 target triple = "i686-pc-linux-gnu"
 

diff --git a/test/CodeGen/X86/change-compare-stride-0.ll b/test/CodeGen/X86/change-compare-stride-0.ll
index 87194d61c37a6e3cd0c78710518c9eeb0ac1666b..d520a6ff13b24d8589a5472400aa32a4dcb6eea1 100644 (file)
--- a/test/CodeGen/X86/change-compare-stride-0.ll
+++ b/test/CodeGen/X86/change-compare-stride-0.ll
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -march=x86 > %t
-; RUN: grep {cmpl      \$4294966818,} %t
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {cmpl      \$-478,} %t
 ; RUN: not grep inc %t
 ; RUN: not grep {leal  1(} %t
 ; RUN: not grep {leal  -1(} %t

diff --git a/test/CodeGen/X86/lea.ll b/test/CodeGen/X86/lea.ll
index 1b295a4265ee2487a7a25edda60ce1d15cdca6a8..b2b388fca498d91e830654bbab160a9e6b905028 100644 (file)
--- a/test/CodeGen/X86/lea.ll
+++ b/test/CodeGen/X86/lea.ll
@@ -28,7 +28,7 @@ bb2:
        ret i32 %x_offs
 ; CHECK: test2:
 ; CHECK:       leal    -5(%rdi), %eax
-; CHECK:       andl    $4294967292, %eax
+; CHECK:       andl    $-4, %eax
 ; CHECK:       negl    %eax
 ; CHECK:       leal    -4(%rdi,%rax), %eax
 }

diff --git a/test/CodeGen/X86/mingw-alloca.ll b/test/CodeGen/X86/mingw-alloca.ll
index 53d2350396ac035e15be1ef03eee5f4090b376de..60673c16e84f50b81b6c0888ae41a26e551b0a10 100644 (file)
--- a/test/CodeGen/X86/mingw-alloca.ll
+++ b/test/CodeGen/X86/mingw-alloca.ll
@@ -1,6 +1,6 @@
 ; RUN: llvm-as < %s | llc -o %t
 ; RUN: grep __alloca %t | count 2
-; RUN: grep 4294967288 %t
+; RUN: grep -- -16 %t
 ; RUN: grep {pushl     %eax} %t
 ; RUN: grep 8028 %t | count 2
 

diff --git a/test/CodeGen/X86/narrow_op-2.ll b/test/CodeGen/X86/narrow_op-2.ll
index b441794f42f98b596ca05005e1d2d8bad75ff3c9..176dcd05b7eb1bd25df35de108304c9a62840781 100644 (file)
--- a/test/CodeGen/X86/narrow_op-2.ll
+++ b/test/CodeGen/X86/narrow_op-2.ll
@@ -1,12 +1,14 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | count 2
-; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | grep 254
-; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | grep 253
+; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
 
        %struct.bf = type { i64, i16, i16, i32 }
 @bfi = external global %struct.bf*
 
 define void @t1() nounwind ssp {
 entry:
+
+; CHECK: andb  $-2, 10(
+; CHECK: andb  $-3, 10(
+
        %0 = load %struct.bf** @bfi, align 8
        %1 = getelementptr %struct.bf* %0, i64 0, i32 1
        %2 = bitcast i16* %1 to i32*

diff --git a/test/CodeGen/X86/pr1489.ll b/test/CodeGen/X86/pr1489.ll
index 10fa96a3b81d9c1d3ff46d14effa46052e9ac309..d54f73891ee96239cfb1b65b18f89ecdf751ed10 100644 (file)
--- a/test/CodeGen/X86/pr1489.ll
+++ b/test/CodeGen/X86/pr1489.ll
@@ -1,12 +1,12 @@
 ; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep 1082126238 | count 3
-; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep 3058016715 | count 1
+; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep -- -1236950581 | count 1
 ;; magic constants are 3.999f and half of 3.999
 ; ModuleID = '1489.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
 target triple = "i686-apple-darwin8"
 @.str = internal constant [13 x i8] c"%d %d %d %d\0A\00"               ; <[13 x i8]*> [#uses=1]
 
-define i32 @quux() {
+define i32 @quux() nounwind {
 entry:
        %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 )               ; <i32> [#uses=1]
        %tmp2 = icmp slt i32 %tmp1, 1           ; <i1> [#uses=1]
@@ -16,7 +16,7 @@ entry:
 
 declare i32 @lrintf(float)
 
-define i32 @foo() {
+define i32 @foo() nounwind {
 entry:
        %tmp1 = tail call i32 @lrint( double 3.999000e+00 )             ; <i32> [#uses=1]
        %tmp2 = icmp slt i32 %tmp1, 1           ; <i1> [#uses=1]
@@ -26,7 +26,7 @@ entry:
 
 declare i32 @lrint(double)
 
-define i32 @bar() {
+define i32 @bar() nounwind {
 entry:
        %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 )               ; <i32> [#uses=1]
        %tmp2 = icmp slt i32 %tmp1, 1           ; <i1> [#uses=1]
@@ -34,7 +34,7 @@ entry:
        ret i32 %tmp23
 }
 
-define i32 @baz() {
+define i32 @baz() nounwind {
 entry:
        %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 )               ; <i32> [#uses=1]
        %tmp2 = icmp slt i32 %tmp1, 1           ; <i1> [#uses=1]
@@ -42,7 +42,7 @@ entry:
        ret i32 %tmp23
 }
 
-define i32 @main() {
+define i32 @main() nounwind {
 entry:
        %tmp = tail call i32 @baz( )            ; <i32> [#uses=1]
        %tmp1 = tail call i32 @bar( )           ; <i32> [#uses=1]

diff --git a/test/CodeGen/X86/remat-mov-1.ll b/test/CodeGen/X86/remat-mov-1.ll
index 98b7bb45e9e71ef92fc5288e0d5a84e0a9d0d1ba..569b14e343c98181aed19d2a521dafe518cc5c52 100644 (file)
--- a/test/CodeGen/X86/remat-mov-1.ll
+++ b/test/CodeGen/X86/remat-mov-1.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep 4294967295 | grep mov | count 2
+; RUN: llvm-as < %s | llc -march=x86 | grep -- -1 | grep mov | count 2
 
        %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
        %struct.ImgT = type { i8, i8*, i8*, %struct.FILE*, i32, i32, i32, i32, i8*, double*, float*, float*, float*, i32*, double, double, i32*, double*, i32*, i32* }

diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll
index 8732579769af80e256eb2e2d4cdcb4af8b18a803..649a40ddb1931bd365686caf94b641a0e6d90c21 100644 (file)
--- a/test/CodeGen/X86/sse3.ll
+++ b/test/CodeGen/X86/sse3.ll
@@ -92,8 +92,8 @@ define <8 x i16> @t7(<8 x i16> %A, <8 x i16> %B) nounwind {
        %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 0, i32 3, i32 2, i32 4, i32 6, i32 4, i32 7 >
        ret <8 x i16> %tmp
 ; X64:         t7:
-; X64:                 pshuflw $176, %xmm0, %xmm0
-; X64:                 pshufhw $200, %xmm0, %xmm0
+; X64:                 pshuflw $-80, %xmm0, %xmm0
+; X64:                 pshufhw $-56, %xmm0, %xmm0
 ; X64:                 ret
 }
 
@@ -120,8 +120,8 @@ define void @t8(<2 x i64>* %res, <2 x i64>* %A) nounwind {
        store <2 x i64> %tmp15.upgrd.2, <2 x i64>* %res
        ret void
 ; X64:         t8:
-; X64:                 pshuflw $198, (%rsi), %xmm0
-; X64:                 pshufhw $198, %xmm0, %xmm0
+; X64:                 pshuflw $-58, (%rsi), %xmm0
+; X64:                 pshufhw $-58, %xmm0, %xmm0
 ; X64:                 movaps  %xmm0, (%rdi)
 ; X64:                 ret
 }
@@ -243,7 +243,7 @@ entry:
 ; X64:         t15:
 ; X64:                 pextrw  $7, %xmm0, %eax
 ; X64:                 punpcklqdq      %xmm1, %xmm0
-; X64:                 pshuflw $128, %xmm0, %xmm0
+; X64:                 pshuflw $-128, %xmm0, %xmm0
 ; X64:                 pinsrw  $2, %eax, %xmm0
 ; X64:                 ret
 }
@@ -265,7 +265,7 @@ entry:
 ; X64:                 movd    %xmm1, %edx
 ; X64:                 pinsrw  $0, %edx, %xmm1
 ; X64:                 movzbl  %cl, %ecx
-; X64:                 andw    $65280, %ax
+; X64:                 andw    $-256, %ax
 ; X64:                 orw     %cx, %ax
 ; X64:                 movaps  %xmm1, %xmm0
 ; X64:                 pinsrw  $1, %eax, %xmm0

diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll
index bbf727a45a5b140c162a1dc2f4aa3f15e07bc523..ecfe38bc7f66dae44c5e4b6542a395357ff1384c 100644 (file)
--- a/test/CodeGen/X86/test-shrink.ll
+++ b/test/CodeGen/X86/test-shrink.ll
@@ -104,10 +104,10 @@ no:
   ret void
 }
 ; CHECK-64: g64x16:
-; CHECK-64:   testw $32896, %di
+; CHECK-64:   testw $-32640, %di
 ; CHECK-64:   ret
 ; CHECK-32: g64x16:
-; CHECK-32:   testw $32896, %ax
+; CHECK-32:   testw $-32640, %ax
 ; CHECK-32:   ret
 define void @g64x16(i64 inreg %x) nounwind {
   %t = and i64 %x, 32896
@@ -121,10 +121,10 @@ no:
   ret void
 }
 ; CHECK-64: g32x16:
-; CHECK-64:   testw $32896, %di
+; CHECK-64:   testw $-32640, %di
 ; CHECK-64:   ret
 ; CHECK-32: g32x16:
-; CHECK-32:   testw $32896, %ax
+; CHECK-32:   testw $-32640, %ax
 ; CHECK-32:   ret
 define void @g32x16(i32 inreg %x) nounwind {
   %t = and i32 %x, 32896

diff --git a/test/CodeGen/X86/vec_shuffle-30.ll b/test/CodeGen/X86/vec_shuffle-30.ll
index eab4a66bd3d2f3354d4db659ba60321fa709e778..a71461bb4f18029e3d770361c86874528f0298f7 100644 (file)
--- a/test/CodeGen/X86/vec_shuffle-30.ll
+++ b/test/CodeGen/X86/vec_shuffle-30.ll
@@ -1,11 +1,11 @@
 ; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -disable-mmx -o %t
-; RUN: grep pshufhw %t | grep 161 | count 1
+; RUN: grep pshufhw %t | grep -- -95 | count 1
 ; RUN: grep shufps %t | count 1
 ; RUN: not grep pslldq %t
 
 ; Test case when creating pshufhw, we incorrectly set the higher order bit
 ; for an undef,
-define void @test(<8 x i16>* %dest, <8 x i16> %in) {
+define void @test(<8 x i16>* %dest, <8 x i16> %in) nounwind {
 entry:
   %0 = load <8 x i16>* %dest
   %1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14>
@@ -14,7 +14,7 @@ entry:
 }                              
 
 ; A test case where we shouldn't generate a punpckldq but a pshufd and a pslldq
-define void @test2(<4 x i32>* %dest, <4 x i32> %in) {
+define void @test2(<4 x i32>* %dest, <4 x i32> %in) nounwind {
 entry:
   %0 = shufflevector <4 x i32> %in, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> < i32 undef, i32 5, i32 undef, i32 2>
   store <4 x i32> %0, <4 x i32>* %dest