Use symbolic operands in the patchpoint folding routine and fix a spilling bug.

Fixes <rdar://15487687> [JS] AnyRegCC argument ends up being spilled

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195094 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index d0dfb80a77b23dd00d0d1760f768cecd37c63a6c..24617737420b3afdd595b0901954e16d1c308201 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -4203,19 +4203,17 @@ static MachineInstr* foldPatchpoint(MachineFunction &MF,
                                     const SmallVectorImpl<unsigned> &Ops,
                                     int FrameIndex,
                                     const TargetInstrInfo &TII) {
-  bool hasDef = MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
-                !MI->getOperand(0).isImplicit();
-  unsigned StartIdx = hasDef ? 1 : 0;
-
+  unsigned StartIdx = 0;
   switch (MI->getOpcode()) {
   case TargetOpcode::STACKMAP:
-    StartIdx += 2; // Skip ID, nShadowBytes.
+    StartIdx = 2; // Skip ID, nShadowBytes.
     break;
-  case TargetOpcode::PATCHPOINT:
-    // Skip ID, numBytes, Target, numArgs.
+  case TargetOpcode::PATCHPOINT: {
     // For PatchPoint, the call args are not foldable.
-    StartIdx += MI->getOperand(StartIdx+3).getImm() + 4;
+    PatchPointOpers opers(MI);
+    StartIdx = opers.getVarIdx();
     break;
+  }
   default:
     llvm_unreachable("unexpected stackmap opcode");
   }

diff --git a/test/CodeGen/X86/anyregcc.ll b/test/CodeGen/X86/anyregcc.ll
index 97abdebc21d05ec5e730fbf03c9b4f3e6890d0c9..8109f879f217cba8a7d0bc4cc12a4bae664a42d8 100644 (file)
--- a/test/CodeGen/X86/anyregcc.ll
+++ b/test/CodeGen/X86/anyregcc.ll
@@ -8,7 +8,7 @@
 ; Num Constants
 ; CHECK-NEXT:   .long   0
 ; Num Callsites
-; CHECK-NEXT:   .long   7
+; CHECK-NEXT:   .long   8
 
 ; test
 ; CHECK-NEXT:   .long   0
@@ -304,5 +304,45 @@ entry:
   ret i64 %result
 }
 
+; Test spilling the arguments of an anyregcc call.
+;
+; <rdar://problem/15487687> [JS] AnyRegCC argument ends up being spilled
+;
+; CHECK-LABEL: .long 13
+; CHECK-LABEL: .long L{{.*}}-_patchpoint_spillargs
+; CHECK-NEXT: .short 0
+; CHECK-NEXT: .short 5
+; Loc 0: Return a register
+; CHECK-NEXT: .byte  1
+; CHECK-NEXT: .byte  8
+; CHECK-NEXT: .short {{[0-9]+}}
+; CHECK-NEXT: .long  0
+; Loc 1: Arg0 in a Register
+; CHECK-NEXT: .byte  1
+; CHECK-NEXT: .byte  8
+; CHECK-NEXT: .short {{[0-9]+}}
+; CHECK-NEXT: .long  0
+; Loc 2: Arg1 in a Register
+; CHECK-NEXT: .byte  1
+; CHECK-NEXT: .byte  8
+; CHECK-NEXT: .short {{[0-9]+}}
+; CHECK-NEXT: .long  0
+; Loc 3: Arg2 spilled to RBP +
+; CHECK-NEXT: .byte  3
+; CHECK-NEXT: .byte  8
+; CHECK-NEXT: .short 7
+; CHECK-NEXT: .long  {{[0-9]+}}
+; Loc 4: Arg3 spilled to RBP +
+; CHECK-NEXT: .byte  3
+; CHECK-NEXT: .byte  8
+; CHECK-NEXT: .short 7
+; CHECK-NEXT: .long  {{[0-9]+}}
+define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
+entry:
+  tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
+  %result = tail call anyregcc i64 (i32, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i32 13, i32 15, i8* inttoptr (i64 0 to i8*), i32 2, i64 %p1, i64 %p2, i64 %p3, i64 %p4)
+  ret i64 %result
+}
+
 declare void @llvm.experimental.patchpoint.void(i32, i32, i8*, i32, ...)
 declare i64 @llvm.experimental.patchpoint.i64(i32, i32, i8*, i32, ...)