// ldrex dest, ptr
// (sign extend dest, if required)
// cmp dest, incr
- // cmov.cond scratch2, dest, incr
+ // cmov.cond scratch2, incr, dest
// strex scratch, scratch2, ptr
// cmp scratch, #0
// bne- loopMBB
AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr))
.addReg(oldval).addReg(incr));
BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2MOVCCr : ARM::MOVCCr), scratch2)
- .addReg(oldval).addReg(incr).addImm(Cond).addReg(ARM::CPSR);
+ .addReg(incr).addReg(oldval).addImm(Cond).addReg(ARM::CPSR);
MIB = BuildMI(BB, dl, TII->get(strOpc), scratch).addReg(scratch2).addReg(ptr);
if (strOpc == ARM::t2STREX)
--- /dev/null
+; RUN: llc -march=arm -mcpu=cortex-a9 %s -o - |& FileCheck %s
+
+; CHECK: max:
+define i32 @max(i8 %ctx, i32* %ptr, i32 %val)
+{
+; CHECK: ldrex
+; CHECK: cmp [[old:r[0-9]*]], [[val:r[0-9]*]]
+; CHECK: movhi {{r[0-9]*}}, [[old]]
+ %old = atomicrmw umax i32* %ptr, i32 %val monotonic
+ ret i32 %old
+}
+
+; CHECK: min:
+define i32 @min(i8 %ctx, i32* %ptr, i32 %val)
+{
+; CHECK: ldrex
+; CHECK: cmp [[old:r[0-9]*]], [[val:r[0-9]*]]
+; CHECK: movlo {{r[0-9]*}}, [[old]]
+ %old = atomicrmw umin i32* %ptr, i32 %val monotonic
+ ret i32 %old
+}