///
class FunctionLoweringInfo {
const TargetMachine &TM;
- const TargetLowering *TLI;
public:
const Function *Fn;
MachineFunction *MF;
/// there's no other convenient place for it to live right now.
std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
- explicit FunctionLoweringInfo(const TargetMachine &TM);
+ explicit FunctionLoweringInfo(const TargetMachine &TM) : TM(TM) {}
/// set - Initialize this FunctionLoweringInfo with the given Function
/// and its associated MachineFunction.
return false;
}
-FunctionLoweringInfo::FunctionLoweringInfo(const TargetMachine &TM)
- : TM(TM), TLI(0) {
-}
-
void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf) {
+ const TargetLowering *TLI = TM.getTargetLowering();
+
Fn = &fn;
MF = &mf;
RegInfo = &MF->getRegInfo();
- TLI = TM.getTargetLowering();
// Check whether the function can return without sret-demotion.
SmallVector<ISD::OutputArg, 4> Outs;
/// CreateReg - Allocate a single virtual register for the given type.
unsigned FunctionLoweringInfo::CreateReg(MVT VT) {
- return RegInfo->createVirtualRegister(TLI->getRegClassFor(VT));
+ return RegInfo->
+ createVirtualRegister(TM.getTargetLowering()->getRegClassFor(VT));
}
/// CreateRegs - Allocate the appropriate number of virtual registers of
/// will assign registers for each member or element.
///
unsigned FunctionLoweringInfo::CreateRegs(Type *Ty) {
+ const TargetLowering *TLI = TM.getTargetLowering();
+
SmallVector<EVT, 4> ValueVTs;
ComputeValueVTs(*TLI, Ty, ValueVTs);
if (!Ty->isIntegerTy() || Ty->isVectorTy())
return;
+ const TargetLowering *TLI = TM.getTargetLowering();
+
SmallVector<EVT, 1> ValueVTs;
ComputeValueVTs(*TLI, Ty, ValueVTs);
assert(ValueVTs.size() == 1 &&