Untabify.
authorNAKAMURA Takumi <geek4civic@gmail.com>
Mon, 2 Nov 2015 01:38:12 +0000 (01:38 +0000)
committerNAKAMURA Takumi <geek4civic@gmail.com>
Mon, 2 Nov 2015 01:38:12 +0000 (01:38 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251769 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/SystemZ/SystemZElimCompare.cpp
lib/Target/SystemZ/SystemZISelLowering.cpp
lib/Target/SystemZ/SystemZISelLowering.h

index adddeef..4818ed0 100644 (file)
@@ -150,9 +150,9 @@ static bool isLoadAndTestAsCmp(MachineInstr *MI) {
   // If we during isel used a load-and-test as a compare with 0, the
   // def operand is dead.
   return ((MI->getOpcode() == SystemZ::LTEBR ||
-          MI->getOpcode() == SystemZ::LTDBR ||
-          MI->getOpcode() == SystemZ::LTXBR) &&
-         MI->getOperand(0).isDead());
+           MI->getOpcode() == SystemZ::LTDBR ||
+           MI->getOpcode() == SystemZ::LTXBR) &&
+          MI->getOperand(0).isDead());
 }
 
 // Return the source register of Compare, which is the unknown value
index 2a2be65..b3e2340 100644 (file)
@@ -5620,8 +5620,8 @@ SystemZTargetLowering::emitTransactionBegin(MachineInstr *MI,
 
 MachineBasicBlock *
 SystemZTargetLowering::emitLoadAndTestCmp0(MachineInstr *MI,
-                                         MachineBasicBlock *MBB,
-                                         unsigned Opcode) const {
+                                          MachineBasicBlock *MBB,
+                                          unsigned Opcode) const {
   MachineFunction &MF = *MBB->getParent();
   MachineRegisterInfo *MRI = &MF.getRegInfo();
   const SystemZInstrInfo *TII =
index 88fd28a..8a2839a 100644 (file)
@@ -531,8 +531,8 @@ private:
                                           unsigned Opcode,
                                           bool NoFloat) const;
   MachineBasicBlock *emitLoadAndTestCmp0(MachineInstr *MI,
-                                        MachineBasicBlock *MBB,
-                                        unsigned Opcode) const;
+                                         MachineBasicBlock *MBB,
+                                         unsigned Opcode) const;
 
 };
 } // end namespace llvm