Reformat the allocation-order arrays to a more conventional style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63121 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td
index b67b1bb2f3fa27c98cc6734c3c2d61b5c47e233b..7303e8a40d4e9d0c0ad0488d047f2e57d436a8e5 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.td
+++ b/lib/Target/X86/X86RegisterInfo.td
@@ -237,20 +237,23 @@ def GR8 : RegisterClass<"X86", [i8],  8,
     iterator allocation_order_end(const MachineFunction &MF) const;
   }];
   let MethodBodies = [{
-      // Does the function dedicate RBP / EBP to being a frame ptr?
-      // If so, don't allocate SPL or BPL.
-      static const unsigned X86_GR8_AO_64_fp[] =
-      {X86::AL,   X86::CL,   X86::DL,   X86::SIL, X86::DIL,
-       X86::R8B,  X86::R9B,  X86::R10B, X86::R11B,
-       X86::BL,   X86::R14B, X86::R15B, X86::R12B, X86::R13B};
-      // If not, just don't allocate SPL.
-      static const unsigned X86_GR8_AO_64[] =
-      {X86::AL,   X86::CL,   X86::DL,   X86::SIL, X86::DIL,
-       X86::R8B,  X86::R9B,  X86::R10B, X86::R11B,
-       X86::BL,   X86::R14B, X86::R15B, X86::R12B, X86::R13B, X86::BPL};
-      // In 32-mode, none of the 8-bit registers aliases EBP or ESP.
-      static const unsigned X86_GR8_AO_32[] =
-      {X86::AL, X86::CL, X86::DL, X86::AH, X86::CH, X86::DH, X86::BL, X86::BH};
+    // Does the function dedicate RBP / EBP to being a frame ptr?
+    // If so, don't allocate SPL or BPL.
+    static const unsigned X86_GR8_AO_64_fp[] = {
+      X86::AL,   X86::CL,   X86::DL,   X86::SIL, X86::DIL,
+      X86::R8B,  X86::R9B,  X86::R10B, X86::R11B,
+      X86::BL,   X86::R14B, X86::R15B, X86::R12B, X86::R13B
+    };
+    // If not, just don't allocate SPL.
+    static const unsigned X86_GR8_AO_64[] = {
+      X86::AL,   X86::CL,   X86::DL,   X86::SIL, X86::DIL,
+      X86::R8B,  X86::R9B,  X86::R10B, X86::R11B,
+      X86::BL,   X86::R14B, X86::R15B, X86::R12B, X86::R13B, X86::BPL
+    };
+    // In 32-mode, none of the 8-bit registers aliases EBP or ESP.
+    static const unsigned X86_GR8_AO_32[] = {
+      X86::AL, X86::CL, X86::DL, X86::AH, X86::CH, X86::DH, X86::BL, X86::BH
+    };
 
     GR8Class::iterator
     GR8Class::allocation_order_begin(const MachineFunction &MF) const {
@@ -290,21 +293,25 @@ def GR16 : RegisterClass<"X86", [i16], 16,
     iterator allocation_order_end(const MachineFunction &MF) const;
   }];
   let MethodBodies = [{
-      // Does the function dedicate RBP / EBP to being a frame ptr?
-      // If so, don't allocate SP or BP.
-      static const unsigned X86_GR16_AO_64_fp[] =
-      {X86::AX,  X86::CX,   X86::DX,   X86::SI,   X86::DI,
-       X86::R8W, X86::R9W,  X86::R10W, X86::R11W,
-       X86::BX, X86::R14W, X86::R15W,  X86::R12W, X86::R13W};
-      static const unsigned X86_GR16_AO_32_fp[] =
-      {X86::AX, X86::CX, X86::DX, X86::SI, X86::DI, X86::BX};
-      // If not, just don't allocate SPL.
-      static const unsigned X86_GR16_AO_64[] =
-      {X86::AX,  X86::CX,   X86::DX,   X86::SI,   X86::DI,
-       X86::R8W, X86::R9W,  X86::R10W, X86::R11W,
-       X86::BX, X86::R14W, X86::R15W,  X86::R12W, X86::R13W, X86::BP};
-      static const unsigned X86_GR16_AO_32[] =
-      {X86::AX, X86::CX, X86::DX, X86::SI, X86::DI, X86::BX, X86::BP};
+    // Does the function dedicate RBP / EBP to being a frame ptr?
+    // If so, don't allocate SP or BP.
+    static const unsigned X86_GR16_AO_64_fp[] = {
+      X86::AX,  X86::CX,   X86::DX,   X86::SI,   X86::DI,
+      X86::R8W, X86::R9W,  X86::R10W, X86::R11W,
+      X86::BX, X86::R14W, X86::R15W,  X86::R12W, X86::R13W
+    };
+    static const unsigned X86_GR16_AO_32_fp[] = {
+      X86::AX, X86::CX, X86::DX, X86::SI, X86::DI, X86::BX
+    };
+    // If not, just don't allocate SPL.
+    static const unsigned X86_GR16_AO_64[] = {
+      X86::AX,  X86::CX,   X86::DX,   X86::SI,   X86::DI,
+      X86::R8W, X86::R9W,  X86::R10W, X86::R11W,
+      X86::BX, X86::R14W, X86::R15W,  X86::R12W, X86::R13W, X86::BP
+    };
+    static const unsigned X86_GR16_AO_32[] = {
+      X86::AX, X86::CX, X86::DX, X86::SI, X86::DI, X86::BX, X86::BP
+    };
 
     GR16Class::iterator
     GR16Class::allocation_order_begin(const MachineFunction &MF) const {
@@ -354,21 +361,25 @@ def GR32 : RegisterClass<"X86", [i32], 32,
     iterator allocation_order_end(const MachineFunction &MF) const;
   }];
   let MethodBodies = [{
-      // Does the function dedicate RBP / EBP to being a frame ptr?
-      // If so, don't allocate ESP or EBP.
-      static const unsigned X86_GR32_AO_64_fp[] =
-      {X86::EAX, X86::ECX,  X86::EDX,  X86::ESI,  X86::EDI,
-       X86::R8D, X86::R9D,  X86::R10D, X86::R11D,
-       X86::EBX, X86::R14D, X86::R15D, X86::R12D, X86::R13D};
-      static const unsigned X86_GR32_AO_32_fp[] =
-      {X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX};
-      // If not, just don't allocate SPL.
-      static const unsigned X86_GR32_AO_64[] =
-      {X86::EAX, X86::ECX,  X86::EDX,  X86::ESI,  X86::EDI,
-       X86::R8D, X86::R9D,  X86::R10D, X86::R11D,
-       X86::EBX, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::EBP};
-      static const unsigned X86_GR32_AO_32[] =
-      {X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP};
+    // Does the function dedicate RBP / EBP to being a frame ptr?
+    // If so, don't allocate ESP or EBP.
+    static const unsigned X86_GR32_AO_64_fp[] = {
+      X86::EAX, X86::ECX,  X86::EDX,  X86::ESI,  X86::EDI,
+      X86::R8D, X86::R9D,  X86::R10D, X86::R11D,
+      X86::EBX, X86::R14D, X86::R15D, X86::R12D, X86::R13D
+    };
+    static const unsigned X86_GR32_AO_32_fp[] = {
+      X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX
+    };
+    // If not, just don't allocate SPL.
+    static const unsigned X86_GR32_AO_64[] = {
+      X86::EAX, X86::ECX,  X86::EDX,  X86::ESI,  X86::EDI,
+      X86::R8D, X86::R9D,  X86::R10D, X86::R11D,
+      X86::EBX, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::EBP
+    };
+    static const unsigned X86_GR32_AO_32[] = {
+      X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP
+    };
 
     GR32Class::iterator
     GR32Class::allocation_order_begin(const MachineFunction &MF) const {