Fix undefined behavior (left shift of negative value) in SystemZ backend.
authorAlexey Samsonov <vonosmas@gmail.com>
Wed, 20 Aug 2014 21:56:43 +0000 (21:56 +0000)
committerAlexey Samsonov <vonosmas@gmail.com>
Wed, 20 Aug 2014 21:56:43 +0000 (21:56 +0000)
This bug is reported by UBSan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216131 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/SystemZ/SystemZFrameLowering.cpp
lib/Target/SystemZ/SystemZISelLowering.cpp

index db1a005353b1cec43b7d84a03e55f3088a2acd56..eff4ae3baf3f506682f68d49941ac39682e5a8e3 100644 (file)
@@ -294,7 +294,7 @@ static void emitIncrement(MachineBasicBlock &MBB,
     else {
       Opcode = SystemZ::AGFI;
       // Make sure we maintain 8-byte stack alignment.
-      int64_t MinVal = -int64_t(1) << 31;
+      int64_t MinVal = -uint64_t(1) << 31;
       int64_t MaxVal = (int64_t(1) << 31) - 8;
       if (ThisVal < MinVal)
         ThisVal = MinVal;
index 228ca6e3d1ecad8d34d3e6291dfff411128bd6c0..3ca2dbae6e4beac9f92eda9a5e042770c2532411 100644 (file)
@@ -2800,14 +2800,10 @@ SystemZTargetLowering::emitAtomicLoadBinary(MachineInstr *MI,
     unsigned Tmp = MRI.createVirtualRegister(RC);
     BuildMI(MBB, DL, TII->get(BinOpcode), Tmp)
       .addReg(RotatedOldVal).addOperand(Src2);
-    if (BitSize < 32)
+    if (BitSize <= 32)
       // XILF with the upper BitSize bits set.
       BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
-        .addReg(Tmp).addImm(uint32_t(~0 << (32 - BitSize)));
-    else if (BitSize == 32)
-      // XILF with every bit set.
-      BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
-        .addReg(Tmp).addImm(~uint32_t(0));
+        .addReg(Tmp).addImm(-1U << (32 - BitSize));
     else {
       // Use LCGR and add -1 to the result, which is more compact than
       // an XILF, XILH pair.