The version of AtomicSDNode::AtomicSDNode used (only) for

cmp-and-swap reversed the Cmp and Swap arguments; comments
make it clear this is unintentional.  Unfortunately, the
x86 BE had a compensating reversal, which is removed here.
PPC is OK.

From inspection of the Alpha code I think it is OK, but
if somebody has that platform please check it out.  I
cannot test on that platform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56091 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index a8b233cb8f04fdcb4d09f503da79102394ea6356..7835f8cc96daddb62f9b82c16d876ae5e57965ab 100644 (file)
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1624,8 +1624,8 @@ class AtomicSDNode : public MemSDNode {
                 Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
-    Ops[2] = Swp;
-    Ops[3] = Cmp;
+    Ops[2] = Cmp;
+    Ops[3] = Swp;
     InitOperands(Ops, 4);
   }
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDValue Chain, SDValue Ptr, 

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index ab4510a87205fbe39e5c843700ce8076b2078c8f..ea9201ca497301017738ece550d52e7c0ba31847 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5899,10 +5899,10 @@ SDValue X86TargetLowering::LowerCMP_SWAP(SDValue Op, SelectionDAG &DAG) {
     break;
   };
   SDValue cpIn = DAG.getCopyToReg(Op.getOperand(0), Reg,
-                                    Op.getOperand(3), SDValue());
+                                    Op.getOperand(2), SDValue());
   SDValue Ops[] = { cpIn.getValue(0),
                       Op.getOperand(1),
-                      Op.getOperand(2),
+                      Op.getOperand(3),
                       DAG.getTargetConstant(size, MVT::i8),
                       cpIn.getValue(1) };
   SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
@@ -5917,18 +5917,18 @@ SDNode* X86TargetLowering::ExpandATOMIC_CMP_SWAP(SDNode* Op,
   MVT T = Op->getValueType(0);
   assert (T == MVT::i64 && "Only know how to expand i64 Cmp and Swap");
   SDValue cpInL, cpInH;
-  cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(3),
+  cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(2),
                       DAG.getConstant(0, MVT::i32));
-  cpInH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(3),
+  cpInH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(2),
                       DAG.getConstant(1, MVT::i32));
   cpInL = DAG.getCopyToReg(Op->getOperand(0), X86::EAX,
                            cpInL, SDValue());
   cpInH = DAG.getCopyToReg(cpInL.getValue(0), X86::EDX,
                            cpInH, cpInL.getValue(1));
   SDValue swapInL, swapInH;
-  swapInL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(2),
+  swapInL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(3),
                         DAG.getConstant(0, MVT::i32));
-  swapInH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(2),
+  swapInH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(3),
                         DAG.getConstant(1, MVT::i32));
   swapInL = DAG.getCopyToReg(cpInH.getValue(0), X86::EBX,
                              swapInL, cpInH.getValue(1));