PR9030: Fix disassembly of ARM "mov pc, lr" instruction.
authorBob Wilson <bob.wilson@apple.com>
Fri, 28 Jan 2011 17:50:30 +0000 (17:50 +0000)
committerBob Wilson <bob.wilson@apple.com>
Fri, 28 Jan 2011 17:50:30 +0000 (17:50 +0000)
Patch by Jyun-Yan You.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124492 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
test/MC/Disassembler/ARM/arm-tests.txt

index 752e2855dcd230ddcf0d22a5d92983cc671e35dc..45c6c300aa1d1ba62b2b3bb1a7f468e616ba0697 100644 (file)
@@ -801,8 +801,8 @@ static bool DisassembleBrMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
 
   OpIdx = 0;
 
-  // BX_RET has only two predicate operands, do an early return.
-  if (Opcode == ARM::BX_RET)
+  // BX_RET and MOVPCLR have only two predicate operands; do an early return.
+  if (Opcode == ARM::BX_RET || Opcode == ARM::MOVPCLR)
     return true;
 
   // BLXr9 and BX take one GPR reg.
index e5952f075f477a15e27ad7addc6ad032db1214a9..07d349fc3b800899ea6a0df76e869df5fed12d5b 100644 (file)
@@ -9,6 +9,9 @@
 # CHECK:       bfi     r8, r0, #16, #1
 0x10 0x88 0xd0 0xe7
 
+# CHECK:       mov     pc, lr
+0x0e 0xf0 0xa0 0xe1
+
 # CHECK:       cmn     r0, #1
 0x01 0x00 0x70 0xe3