changes to make it compatible with 64bit gcc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2791 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/InstrSelection/InstrSelection.cpp b/lib/CodeGen/InstrSelection/InstrSelection.cpp
index b27f9022bba8d01c42d91ce1d7de57372dacc72f..c43f8ddf84eec78eafb249d2c9e14b697d3300f5 100644 (file)
--- a/lib/CodeGen/InstrSelection/InstrSelection.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelection.cpp
@@ -27,6 +27,7 @@
 #include "Support/CommandLine.h"
 #include <iostream>
 using std::cerr;
+using std::vector;
 
 //******************** Internal Data Declarations ************************/
 
@@ -152,7 +153,7 @@ SelectInstructionsForMethod(Function *F, TargetMachine &target)
 //-------------------------------------------------------------------------
 
 void
-InsertPhiElimInstructions(BasicBlock *BB, const vector<MachineInstr*>& CpVec)
+InsertPhiElimInstructions(BasicBlock *BB, const std::vector<MachineInstr*>& CpVec)
 { 
   Instruction *TermInst = (Instruction*)BB->getTerminator();
   MachineCodeForInstruction &MC4Term =MachineCodeForInstruction::get(TermInst);
@@ -294,7 +295,7 @@ SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt,
   // 
   if (treeRoot->opLabel != VRegListOp)
     {
-      vector<MachineInstr*> minstrVec;
+      std::vector<MachineInstr*> minstrVec;
       
       InstructionNode* instrNode = (InstructionNode*)treeRoot;
       assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);

diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index c7c9756ce77600ae22af53e129aaa5055f9c481c..e884463ae29fc451ec4a6cebcf6cd85cc86e7040 100644 (file)
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -28,6 +28,7 @@
 #include <iostream>
 #include <math.h>
 using std::cerr;
+using std::vector;
 
 RegAllocDebugLevel_t DEBUG_RA;
 static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",

diff --git a/lib/Support/Signals.cpp b/lib/Support/Signals.cpp
index 8aa1b6047ab0fcb3143daaaf1fdf535505c143cf..29daedf0fb9a05a3ead305ba4566a725ecc3113a 100644 (file)
--- a/lib/Support/Signals.cpp
+++ b/lib/Support/Signals.cpp
@@ -11,8 +11,9 @@
 #include <cstdlib>
 #include <cstdio>
 #include <signal.h>
+using std::string;
 
-static vector<string> FilesToRemove;
+static std::vector<string> FilesToRemove;
 
 // IntSigs - Signals that may interrupt the program at any time.
 static const int IntSigs[] = {
@@ -36,7 +37,7 @@ static void SignalHandler(int Sig) {
     FilesToRemove.pop_back();
   }
 
-  if (find(IntSigs, IntSigsEnd, Sig) != IntSigsEnd)
+  if (std::find(IntSigs, IntSigsEnd, Sig) != IntSigsEnd)
     exit(1);   // If this is an interrupt signal, exit the program
 
   // Otherwise if it is a fault (like SEGV) reissue the signal to die...
@@ -48,6 +49,6 @@ static void RegisterHandler(int Signal) { signal(Signal, SignalHandler); }
 void RemoveFileOnSignal(const string &Filename) {
   FilesToRemove.push_back(Filename);
 
-  for_each(IntSigs, IntSigsEnd, RegisterHandler);
-  for_each(KillSigs, KillSigsEnd, RegisterHandler);
+  std::for_each(IntSigs, IntSigsEnd, RegisterHandler);
+  std::for_each(KillSigs, KillSigsEnd, RegisterHandler);
 }

diff --git a/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp b/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp
index b27f9022bba8d01c42d91ce1d7de57372dacc72f..c43f8ddf84eec78eafb249d2c9e14b697d3300f5 100644 (file)
--- a/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp
+++ b/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp
@@ -27,6 +27,7 @@
 #include "Support/CommandLine.h"
 #include <iostream>
 using std::cerr;
+using std::vector;
 
 //******************** Internal Data Declarations ************************/
 
@@ -152,7 +153,7 @@ SelectInstructionsForMethod(Function *F, TargetMachine &target)
 //-------------------------------------------------------------------------
 
 void
-InsertPhiElimInstructions(BasicBlock *BB, const vector<MachineInstr*>& CpVec)
+InsertPhiElimInstructions(BasicBlock *BB, const std::vector<MachineInstr*>& CpVec)
 { 
   Instruction *TermInst = (Instruction*)BB->getTerminator();
   MachineCodeForInstruction &MC4Term =MachineCodeForInstruction::get(TermInst);
@@ -294,7 +295,7 @@ SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt,
   // 
   if (treeRoot->opLabel != VRegListOp)
     {
-      vector<MachineInstr*> minstrVec;
+      std::vector<MachineInstr*> minstrVec;
       
       InstructionNode* instrNode = (InstructionNode*)treeRoot;
       assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);

diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index c7c9756ce77600ae22af53e129aaa5055f9c481c..e884463ae29fc451ec4a6cebcf6cd85cc86e7040 100644 (file)
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -28,6 +28,7 @@
 #include <iostream>
 #include <math.h>
 using std::cerr;
+using std::vector;
 
 RegAllocDebugLevel_t DEBUG_RA;
 static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",

diff --git a/lib/Target/SparcV9/SparcV9InstrInfo.cpp b/lib/Target/SparcV9/SparcV9InstrInfo.cpp
index 5fbced0f9f1096a0e03486d9ad6ce0799f76db6d..7bd8dd2437ae6a6f4794777aacafea8da94dc109 100644 (file)
--- a/lib/Target/SparcV9/SparcV9InstrInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrInfo.cpp
@@ -22,7 +22,7 @@
 #include "llvm/Instruction.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
-
+using std::vector;
 
 //************************ Internal Functions ******************************/
 

diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index b85b58f39becc8541044108ec4d5bc72bba6b01f..b1a7ec3f73ad8b75127a67e486708a5b30ac87c2 100644 (file)
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -455,16 +455,16 @@ public:
   // for an architecture.
   //
   void cpReg2RegMI(unsigned SrcReg, unsigned DestReg,
-                   int RegType, vector<MachineInstr*>& mvec) const;
+                   int RegType, std::vector<MachineInstr*>& mvec) const;
   
   void cpReg2MemMI(unsigned SrcReg, unsigned DestPtrReg,
-                   int Offset, int RegType, vector<MachineInstr*>& mvec) const;
+                   int Offset, int RegType, std::vector<MachineInstr*>& mvec) const;
 
   void cpMem2RegMI(unsigned SrcPtrReg, int Offset, unsigned DestReg,
-                   int RegType, vector<MachineInstr*>& mvec) const;
+                   int RegType, std::vector<MachineInstr*>& mvec) const;
 
   void cpValue2Value(Value *Src, Value *Dest,
-                     vector<MachineInstr*>& mvec) const;
+                     std::vector<MachineInstr*>& mvec) const;
 
   // To see whether a register is a volatile (i.e., whehter it must be
   // preserved acorss calls)

diff --git a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
index 72431499fb529ea92fd8ad5fc0169ed3512e4786..79f6871505423d3a2d66042c5a2269af5d0b48b1 100644 (file)
--- a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
+++ b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
@@ -52,7 +52,7 @@ namespace {
 
 void InsertPrologEpilogCode::InsertPrologCode(Function &F)
 {
-  vector<MachineInstr*> mvec;
+  std::vector<MachineInstr*> mvec;
   MachineInstr* M;
   const MachineFrameInfo& frameInfo = Target.getFrameInfo();
   

diff --git a/lib/Target/SparcV9/SparcV9RegClassInfo.cpp b/lib/Target/SparcV9/SparcV9RegClassInfo.cpp
index da40826b3e0ff4f0c70336764e5cec9f2aa0c006..08e33245ba3ac04481b56ff9536b5283d0365f9e 100644 (file)
--- a/lib/Target/SparcV9/SparcV9RegClassInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9RegClassInfo.cpp
@@ -4,6 +4,7 @@
 #include "llvm/Type.h"
 #include <iostream>
 using std::cerr;
+using std::vector;
 
 //-----------------------------------------------------------------------------
 // Int Register Class - method for coloring a node in the interference graph.

diff --git a/lib/Target/SparcV9/SparcV9RegInfo.cpp b/lib/Target/SparcV9/SparcV9RegInfo.cpp
index 6aa4d816264141ddfe22f6e8cf73664885fd159a..96ff5ad0f529734fcea7b12f01e542f798ea8a76 100644 (file)
--- a/lib/Target/SparcV9/SparcV9RegInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9RegInfo.cpp
@@ -22,6 +22,7 @@
 #include <iostream>
 #include <values.h>
 using std::cerr;
+using std::vector;
 
 UltraSparcRegInfo::UltraSparcRegInfo(const UltraSparc &tgt)
   : MachineRegInfo(tgt), UltraSparcInfo(&tgt), NumOfIntArgRegs(6), 

diff --git a/lib/Transforms/LevelRaise.cpp b/lib/Transforms/LevelRaise.cpp
index c3100347680a9e02e618b6f6c1c625e34fdf3115..afc2ad5d7a670bcf0ad7b7acc15e421e8b751556 100644 (file)
--- a/lib/Transforms/LevelRaise.cpp
+++ b/lib/Transforms/LevelRaise.cpp
@@ -18,6 +18,7 @@
 #include "Support/STLExtras.h"
 #include "Support/StatisticReporter.h"
 #include <algorithm>
+using std::cerr;
 
 static Statistic<> NumLoadStorePeepholes("raise\t\t- Number of load/store peepholes");
 static Statistic<> NumGEPInstFormed("raise\t\t- Number of other getelementptr's formed");

diff --git a/support/lib/Support/Signals.cpp b/support/lib/Support/Signals.cpp
index 8aa1b6047ab0fcb3143daaaf1fdf535505c143cf..29daedf0fb9a05a3ead305ba4566a725ecc3113a 100644 (file)
--- a/support/lib/Support/Signals.cpp
+++ b/support/lib/Support/Signals.cpp
@@ -11,8 +11,9 @@
 #include <cstdlib>
 #include <cstdio>
 #include <signal.h>
+using std::string;
 
-static vector<string> FilesToRemove;
+static std::vector<string> FilesToRemove;
 
 // IntSigs - Signals that may interrupt the program at any time.
 static const int IntSigs[] = {
@@ -36,7 +37,7 @@ static void SignalHandler(int Sig) {
     FilesToRemove.pop_back();
   }
 
-  if (find(IntSigs, IntSigsEnd, Sig) != IntSigsEnd)
+  if (std::find(IntSigs, IntSigsEnd, Sig) != IntSigsEnd)
     exit(1);   // If this is an interrupt signal, exit the program
 
   // Otherwise if it is a fault (like SEGV) reissue the signal to die...
@@ -48,6 +49,6 @@ static void RegisterHandler(int Signal) { signal(Signal, SignalHandler); }
 void RemoveFileOnSignal(const string &Filename) {
   FilesToRemove.push_back(Filename);
 
-  for_each(IntSigs, IntSigsEnd, RegisterHandler);
-  for_each(KillSigs, KillSigsEnd, RegisterHandler);
+  std::for_each(IntSigs, IntSigsEnd, RegisterHandler);
+  std::for_each(KillSigs, KillSigsEnd, RegisterHandler);
 }