[mips][microMIPS] MicroMIPS Compact Branch Instructions BEQZC and BNEZC
authorZoran Jovanovic <zoran.jovanovic@imgtec.com>
Thu, 14 Aug 2014 12:09:10 +0000 (12:09 +0000)
committerZoran Jovanovic <zoran.jovanovic@imgtec.com>
Thu, 14 Aug 2014 12:09:10 +0000 (12:09 +0000)
Differential Revision: http://reviews.llvm.org/D3545

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215636 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MicroMipsInstrFormats.td
lib/Target/Mips/MicroMipsInstrInfo.td

index 15b951d98c527a65110e1d34e0e9701368753dbb..90fbce724783d7a4091801364ef8dfb533b597b7 100644 (file)
@@ -621,3 +621,15 @@ class MADDS_FM_MM<bits<6> funct>: MMArch {
   let Inst{10-6}  = fr;
   let Inst{5-0}   = funct;
 }
+
+class COMPACT_BRANCH_FM_MM<bits<5> funct> {
+  bits<5>  rs;
+  bits<16> offset;
+
+  bits<32> Inst;
+
+  let Inst{31-26} = 0x10;
+  let Inst{25-21} = funct;
+  let Inst{20-16} = rs;
+  let Inst{15-0}  = offset;
+}
index 87a3a3e29ca2c4bd5a78cfccb71264b2a90776b5..f48083bbe6e7f5af66fea6952119b359a3acd7d5 100644 (file)
@@ -26,6 +26,16 @@ def brtarget_mm : Operand<OtherVT> {
   let DecoderMethod = "DecodeBranchTargetMM";
 }
 
+class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
+                      RegisterOperand RO> :
+  InstSE<(outs), (ins RO:$rs, opnd:$offset),
+         !strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI> {
+  let isBranch = 1;
+  let isTerminator = 1;
+  let hasDelaySlot = 0;
+  let Defs = [AT];
+}
+
 let canFoldAsLoad = 1 in
 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
                       Operand MemOpnd> :
@@ -104,6 +114,12 @@ class WaitMM<string opstr> :
          NoItinerary, FrmOther, opstr>;
 
 let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
+  /// Compact Branch Instructions
+  def BEQZC_MM : CompactBranchMM<"beqzc", brtarget_mm, seteq, GPR32Opnd>,
+                 COMPACT_BRANCH_FM_MM<0x7>;
+  def BNEZC_MM : CompactBranchMM<"bnezc", brtarget_mm, setne, GPR32Opnd>,
+                 COMPACT_BRANCH_FM_MM<0x5>;
+
   /// Arithmetic Instructions (ALU Immediate)
   def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>,
                  ADDI_FM_MM<0xc>;